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7672 Просмотр технического описания (PDF) - MAXWELL TECHNOLOGIES

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7672
Maxwell
MAXWELL TECHNOLOGIES Maxwell
7672 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
12-Bit A/D Converter
7672
PARAMETER
TABLE 4. 7672 DC ELECTRICAL CHARACTERISTICS
(VDD = 5V ±5%, VSS = -12V ±10%, VREF = -5V, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED)
SYMBOL TEST CONDITION
SUBGROUPS MIN
MAX
Bipolar Zero Error
Bipolar Gain Error
1. Guaranteed by design.
BZE TA = +25°C
TA = -55 to +125°C
BGE TA = +25°C
TA = -55 to +125°C
1
--
±5
2, 3
--
±6
1
--
±5
2, 3
--
±7
UNITS
LSB
LSB
PARAMETER
TABLE 5. 7672 TIMING CHARACTERISTICS 1,2
(VDD = 5V ±5%, VSS = -12V ±10%, VREF = -5V, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED)
TEST CONDITION
SUBGROUPS SYMBOL MIN MAX
UNITS
Conversion Time, Synchronous Clk, 3 12.5 clks, TA = -55 to +125 °C
9, 10, 11 tCONV -- 5.0 us
Conversion Time, Asynchronous Clk, 12-13 clks, TA = -55 to +125 °C
9, 10, 11 tCONV 4.8 5.2 us
CS to RD Setup Time
TA = -55 to +125 °C
9, 10, 11 t1
0
-- ns
RD to BUSY Delay
CL = 50 pF, TA = +25 °C
9
t2
-- 190 ns
CL = 50 pF, TA = -55 to +125 °C
10, 11
-- 270
Data Access Time 4
CL = 100 pF, TA = +25 °C
9
t3
-- 125 ns
CL = 100 pF, TA = -55 to +125 °C 10, 11
-- 170
RD Pulse Width
TA = -55 to +125 °C
9, 10, 11 t4
t3 -- ns
CS to RD Hold Time
TA = -55 to +125 °C
9, 10, 11 t5
0
-- ns
Data Setup Time After BUSY4
CL = 100 pF, TA = +25 °C
9
t6
-- 70 ns
CL = 100 pF, TA = -55 to +125 °C 10, 11
--
-- 100
Bus Relinguish Time5
(TA = +25 °C)
(-55 < TA < +125 °C)
9
t7
-- 75 ns
10, 11
-- 90
Delay Between Read Operations
(-55 < TA < +125 °C)
9, 10, 11 t8
200 -- ns
1. 1LSB = FS/4096; TA = 25 °C; Performance over power supply tolerance is guaranteed by power supply rejection test.
2. All inputs are 0V to +5V swing with tr = tr = 5ns (10 to 90% of +5V) and timed from a voltage level of +1.6V.
3. Functionally tested.
4. t3 and t6 are measured with the load circuits of Figure 1 and are defined as the time required for an output to cross +0.8 or
+2.4.
5. t7 is defined as the time required for the data lines to change 0.5V when loaded with the circuit of Figure 2.
08.09.02 REV 13
All data sheets are subject to change without notice 4
©2002 Maxwell Technologies
All rights reserved.

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