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TEA1753T Просмотр технического описания (PDF) - NXP Semiconductors.

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TEA1753T Datasheet PDF : 32 Pages
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NXP Semiconductors
TEA1753T
HV start-up flyback controller with integrated PFC controller
7.1.3 Supply management
All internal reference voltages are derived from a temperature compensated and trimmed
on-chip band gap circuit. Internal reference currents are derived from a temperature
compensated and trimmed on-chip current reference circuit.
7.1.4 Latch input
The LATCH pin is a general-purpose input pin, which is used to switch off both converters.
The pin sources a current IO(LATCH) of 80 A. Switching is stopped as soon as the voltage
on the latch drops below 1.25 V.
At initial start-up, switching is prevented until the capacitor on the LATCH pin is charged
above 1.35 V. No internal filtering is done on this pin. An internal Zener clamp of 2.9 V
protects this pin from excessive voltages.
7.1.5 Fast latch reset
In a typical application, the mains is interrupted briefly to reset the latched protection. The
PFC bus capacitor, Cbus, does not have to discharge for this latched protection to reset.
When the VINSENSE voltage drops below 750 mV and is then raised to 870 mV, the
latched protection is reset.
The latched protection is also reset by removing the voltage from the VCC and HV pins.
7.1.6 Overtemperature protection
An accurate internal temperature protection is provided in the circuit. When the junction
temperature exceeds the thermal shut-down temperature, the IC stops switching. While
OTP is active, the capacitor CVCC is not recharged from the HV mains. If the VCC supply
voltage is not sufficient, the OTP circuit is supplied from the HV pin.
OTP is a latched protection. It is reset by removing the voltage from the VCC and HV pins
or by the fast latch reset function (see Section 7.1.5).
7.2 Power factor correction circuit
The power factor correction circuit operates in quasi-resonant or Discontinuous
Conduction Mode (DCM) with valley switching. The next primary stroke is only started
when the previous secondary stroke has ended and the voltage across the PFC MOSFET
has reached a minimum value. VPFCAUX is used to detect transformer demagnetization
and the minimum voltage across the external PFC MOSFET switch.
7.2.1 ton control
The power factor correction circuit is operated in ton control. The resulting mains harmonic
reduction is well within the class-D requirements.
7.2.2 Valley switching and demagnetization (PFCAUX pin)
The PFC MOSFET is switched on after the transformer is demagnetized. Internal circuitry
connected to the PFCAUX pin detects the end of the secondary stroke. It also detects the
voltage across the PFC MOSFET. To reduce switching losses and electromagnetic
Interference (EMI) (valley switching), the next stroke is started if the voltage across the
PFC MOSFET is at its minimum.
TEA1753T
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3. — 24 August 2012
© NXP B.V. 2012. All rights reserved.
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