TB6865AFG(2013) Просмотр технического описания (PDF) - Toshiba

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TB6865AFG
(Rev.:2013)

Qi compliant wireless power transmitter IC

Toshiba 

Preliminary

TB6865AFG

8.3 Reset

The TB6865AFG has four reset sources: an external reset pin (XRESET), a watchdog timer (WDT), a low voltage

detection reset (LVD) and the setting <SYSRESETREQ> in the Application Interrupt and Reset Control Register.

For reset from the WDT, refer to the 8.4 WDT.

For reset from the LVD, refer to the 8.11 LVD.

For reset from <SYSRESETREQ>, refer to "Cortex-M3 Technical Reference Manual".

8.4 Watchdog Timer (WDT)

The watchdog timer (WDT) is for detecting malfunctions (runaways) of the CPU caused by noises or other

disturbances and remedying them to return the CPU to normal operation.

If the watchdog timer detects a runaway, it generates a INTWDT interrupt or reset.

Note:

INTWDT interrupt is a factor of the non-makeable interrupts (NMI).

Also, the watchdog timer notifies of the detecting malfunction to the external peripheral devices from the

watchdog timer pin (WDTOUT) by outputting "Low".

Note: This product does not have the watchdog timer out pin (WDTOUT).

8.4.1 Configuration

Figure 8.2 shows the block diagram of the watchdog timer.

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2013-12-25

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