MC54HC589A Просмотр технического описания (PDF) - Motorola => Freescale
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MC54HC589A
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MC54HC589A Datasheet PDF : 12 Pages
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Product Preview
8-Bit Serial or Parallel-Input/
Serial-Output Shift Register
with 3-State Output
High–Performance Silicon–Gate CMOS
The MC54/74HC589A is similar in function to the HC597, which is not a
3–state device. The device inputs are compatible with standard CMOS
outputs, with pullup resistors, they are compatible with LSTTL outputs.
This device consists of an 8–bit storage latch which feeds parallel data to
an 8–bit shift register. Data can also be loaded serially (see Function Table).
The shift register output, QH, is a three–state output, allowing this device to
be used in bus–oriented systems.
The HC589A directly interfaces with the Motorola SPI serial data port on
CMOS MPUs and MCUs.
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 526 FETs or 131.5 Equivalent Gates
SERIAL
DATA
INPUT
SA 14
PARALLEL
DATA
INPUTS
A 15
B1
C2
D3
E4
F5
G6
H7
LATCH CLOCK 12
LOGIC DIAGRAM
DATA
LATCH
SHIFT
REGISTER
VCC = PIN 16
GND = PIN 8
SERIAL
9 QH DATA
OUTPUT
MC54/74HC589A
16
1
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
16
1
16
1
D SUFFIX
SOIC PACKAGE
CASE 751B–05
DT SUFFIX
TSSOP PACKAGE
CASE 948F–01
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXAD
MC74HCXXXADT
Ceramic
Plastic
SOIC
TSSOP
PIN ASSIGNMENT
B1
C2
16 VCC
15 A
D3
E4
F5
14 SA
13
SERIAL SHIFT/
PARALLEL LOAD
12 LATCH CLOCK
G6
H7
11 SHIFT CLOCK
10 OUTPUT ENABLE
GND 8
9 QH
SHIFT CLOCK 11
SERIAL SHIFT/ 13
PARALLEL LOAD
OUTPUT ENABLE 10
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
10/95
© Motorola, Inc. 1995
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