PQ208_ Просмотр технического описания (PDF) - Actel Corporation

Номер в каталоге

Компоненты Описание

Список матч

PQ208_

SX-A Family FPGAs

Actel Corporation 

SX-A Family FPGAs

4 QCLKBUFS

Quadrant 2

4

5:1

5:1

Quadrant 3

QCLKINT (to array)

Quadrant 0

5:1

QCLKINT (to array)

4

5:1

Quadrant 1

QCLKINT (to array)

Figure 1-9 • SX-A QCLK Architecture

QCLKINT (to array)

OE

From Internal Logic

Clock Network

CLKBUF

CLKBUFI

CLKINT

CLKINTI

CLKBIBUF

CLKBIBUFI

From Internal Logic

QCLKBUF

QCLKBUFI

QCLKINT

QCLKINTI

QCLKBIBUF

QCLKBIBUFI

Figure 1-10 • A54SX72A Routed Clock and QCLK Buffer

1-6

v5.3

Share Link: