IW4011B Просмотр технического описания (PDF) - IK Semicon Co., Ltd
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IW4011B Datasheet PDF : 5 Pages
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TECHNICAL DATA
Quad 2-Input NAND Gate
High-Voltage Silicon-Gate CMOS
IW4011B
The IW4011B NAND gates provide the system designer with direct
emplementation of the NAND function.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 μA at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4011BN Plastic
IW4011BD SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 14 =VCC
PIN 7 = GND
FUNCTION TABLE
Inputs
A
B
L
L
L
H
H
L
H
H
Output
Y
H
H
H
L
Rev. 00
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