USB2507-ADT Просмотр технического описания (PDF) - Microchip Technology
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USB2507-ADT Datasheet PDF : 42 Pages
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USB2507
TABLE 4-1:
Name
7-PORT HUB PIN DESCRIPTIONS (CONTINUED)
Symbol
Type
Function
Serial Data/SMB
Data
Serial Clock/SMB
Clock
&
Config Select 0
Configuration
Programming
Select
SDA/SMBDATA
SCL/SMBCLK/
CFG_SEL0
CFG_SEL1
SERIAL PORT INTERFACE
IOSD12 (Serial Data)/(SMB Data) signal.
IOSD12
I
(Serial Clock)/(SMB Clock) signal. This multifunction pin is
read on the rising edge of RESET_N (see the applicable
RESET_N timing table in Section 5.6.1) and will determine
the hub configuration method as described in Table 4-2.
This multifunction pin is read on the rising edge of RESET_N
(see the applicable RESET_N timing table in Section 5.6.1)
and will determine the hub configuration method as described
in Table 4-2.
TABLE 4-2:
SMBUS OR EEPROM INTERFACE BEHAVIOR
CFG_SEL1 CFG_SEL0
SMBus or EEPROM Interface Behavior
0
0
Reserved
0
1
Configured as an SMBus slave for external download of user-
defined descriptors. SMBus slave address is 0101100
1
0
Internal Default Configuration via strapping options.
1
1
2-wire (I2C) EEPROMS are supported,
TABLE 4-3: MISCELLANEOUS PINS
Name
Symbol
Type
Crystal
Input/External
Clock Input
Crystal Output
XTAL1/
CLKIN
XTAL2
ICLKx
OCLKx
Clock Input
CLKIN_EN
I
Enable
RESET Input
RESET_N
IS
Self-Power /
SELF_PWR
I
Bus-Power
Detect
TEST Pins
TEST[1:0]
IPD
Analog Test
ATEST/
AIO
&
REG_EN
Internal 1.8V
voltage regulator
enable
Function
24MHz crystal or external clock input.
This pin connects to either one terminal of the crystal or to
an external 24MHz clock when a crystal is not used.
24MHz Crystal
This is the other terminal of the crystal, or left unconnected
when an external clock source is used to drive
XTAL1/CLKIN. It must not be used to drive any external
circuitry other than the crystal circuit.
Clock In Enable:
Low = XTAL1 and XTAL2 pins configured for use with
external crystal
High = XTAL1 pin configured as CLKIN, and must be
driven by an external CMOS clock.
This active low signal is used by the system to reset the
chip. The minimum active low pulse is 1us.
Detects availability of local self-power source.
Low = Self/local power source is NOT available (i.e., Hub
gets all power from Upstream USB VBus).
High = Self/local power source is available.
Used for testing the chip. User must treat as a no-connect
or connect to ground.
This signal is used for testing the analog section of the
chip, and to enable or disable the internal 1.8v regulator.
This pin must be connected to VDDA33 to enable the
internal 1.8V regulator, or to VSS to disable the internal
regulator.
When the internal regulator is enabled, the 1.8V power
pins must be left unconnected, except for the required
bypass capacitors.When the PHY is in test mode, the
internal regulator is disabled and the ATEST pin functions
as a test pin.
DS000002251A-page 10
2007 - 2016 Microchip Technology Inc.
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