*7 Test Circuit for Rise Time, Fall Time vs. Load Resistance
Pulse
input
Duty ratio
= 1 / 10
Pulse
oscillator
IF
1
2
3
IF monitor
4
100 Ω
8
VCC
7
RL
6
VO
5
CL = 15 PF
6N139
IF
O
VO
tPHL
Input
Output
(saturated)
1.5V
tPLH
5V
1.5V
VOL
10 %
90% 10%
90% 5V
2V
tr
tf
Output
(non-saturated)
s Precautions for Use
( 1) It is recommended that a by-pass capacitor of more than 0.01µF be added between VCC and
GND near the device in order to stabilize power supply line.
( 2) Transistor of detector side in bipolar configuration is apt to be affected by static electricity
for its minute design. When handling them, general counterplan against static electricity
should be taken to avoid breakdown of devices or degradation of characteristics.
( 3) As for other general cautions, please refer to the chapter “ Precautions for Use ” .