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PTM1300

Programmable Media Processor

Philips Electronics 

TriMedia TM-1300

System-on-a-chip

multimedia

engine

TRIMEDIA TM-1300 ARCHITECTURE

On a single chip, the TM-1300 incorporates a powerful CPU and

peripherals to accelerate processing of audio, video, graphics, control,

and communications datastreams.

The TriMedia TM-1300 strikes a perfect balance between

cost and performance. A powerful C/C++-programmable

VLIW CPU coordinates on-chip activities. To reap the full

benefit of the CPU, independent, on-chip, bus-mastering

DMA peripheral units manage and format datastream I/O

and accelerate processing of multimedia algorithms. A

sophisticated memory hierarchy manages internal I/O and

streamlines access to external memory. The result—a single,

low-cost, programmable system-on-a-chip uniquely suited

for both standalone and hosted multimedia products.

PROGRAMMABLE VLIW CPU

A powerful DSP-like CPU delivers top performance through an ele-

gant implementation of a fine-grain parallel, very-long instruction

word (VLIW) architecture. Its five issue-slot instruction length enables

up to five simultaneous operations to be scheduled into a single VLIW

instruction. These operations can simultaneously target any five of the

CPU’s 27 pipelined functional units within one clock cycle. Most

common operations have their results available in one clock cycle;

more complex operations may have multicycle latencies.

Unique to the TriMedia VLIW implementation, parallelism is opti-

mized at compile time by an innovative compilation system. No spe-

cialized scheduling hardware is required to parallelize code during exe-

cution. Hardware saved by eliminating complex scheduling logic

reduces cost and allows the integration of multimedia-specific features

that enhance the power of the CPU.

The TM-1300 CPU implements a 32-bit linear address space and 128

fully general-purpose 32-bit registers. Registers are not separated into

banks enabling any operation to use any register for any operand.

High-powered, DSP-like, C/C++-callable special operations—In

addition to traditional microprocessor operations and a full comple-

ment of 32-bit, IEEE-compliant, floating point operations, the TM-

1300 instruction set includes special multimedia and DSP operations

(ops) to accelerate the performance of SIMD (single instruction, mul-

tiple data) computations common in multimedia applications. These

special ops combine multiple simple operations into a single VLIW

instruction that can implement up to 12 traditional microprocessor

operations in a single clock cycle. When incorporated into application

source code, special ops dramatically improve performance and

increase the efficiency of the TM-1300 parallel architecture.

Special multimedia ops are invoked with familiar function-call syntax

consistent with the C/C++ programming languages. They are auto-

matically scheduled to take full advantage of the TriMedia processor’s

highly parallel VLIW implementation. As with all other operations

generated by the TriMedia VLIW compilation system, the scheduler

takes care of register allocation, operation packing, and flow analysis.

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