Philips Semiconductors
Microcontrollers for monitors with DDC
interface, auto-sync detection and sync proc.
Product specification
P83Cx80; P87C380
1 FEATURES
• 80C51 type core
• On-chip oscillator with a maximum frequency of 16 MHz
(maximum 0.75 µs instruction cycle)
• A DDC interface:
– That fully supports DDC1 with specific hardware
– That is DDC2B, DDC2B+, DDC2AB (ACCESS.bus)
compliant, based on a dedicated hardware I2C-bus
interface.
– Contains a specific AUX-RAM buffer with
programmable size (128 or 256 bytes) that can be
used for DDC operation and shared as system RAM
• Automatic mode detection by hardware to capture the
following information:
– HSYNC frequency with 12-bit resolution
– VSYNC frequency with 12-bit resolution
– HSYNC and VSYNC polarity
– HSYNC and VSYNC presence; needed for the VESA
Device Power Management Signalling (DPMS)
standard
• On-chip sync processor comprising:
– Composite sync separation
– Free running mode
– Clamping
– Pattern generation
• Two specific ports for the software I2C-bus interface
• 4 analog voltage outputs derived from an 8-bit
Digital-to-Analog Converter (DAC)
• Ten 8-bit Pulse Width Modulation (PWM) outputs for
digital control application
• One 14-bit PWM output for digital control application
• One 4-bit Analog-to-Digital Converter (ADC) with 2 input
channels (for keyboard interface)
• LED driver port (Port 0); eight port lines with 10 mA drive
capability
• One 8-bit port only for I/O function
• 20 derivative I/O ports with the specific port type
configuration in each alternative function
• Watchdog Timer with a programmable interval
• On-chip Power-on-reset for low power detection
• Special Idle and Power-down modes for reduced power
operation
• Optimized for Electromagnetic Compatibility (EMC)
• Operating temperature: −25 to +85 °C
• Single power supply: 4.4 to 5.5 V.
1.1 Differences from the 80C51 core
• No external memory connection; signals EA, ALE and
PSEN are not present.
• Port 1, Port 2 and Port 3 (P3.0 to P3.3 only) mixed with
other derivative functions.
• Timer 0/Counter 0 and Timer 1/Counter 1: external
input is removed.
• External interrupt 0/INT0 replaced by Mode detection
function.
• Standard serial interface (UART) and its control register
are removed.
• Wake-up from Power-down mode is also possible by
means of an interrupt.
1.2 Memory
Table 1 ROM/RAM sizes
DEVICE
P83C880
P83C180
P83C280
P83C380
P87C380 (OTP)
MEMORY
ROM
RAM
8 kbytes
16 kbytes
24 kbytes
32 kbytes
16 kbytes
512 bytes
512 bytes
512 bytes
512 bytes
512 bytes
1997 Dec 12
3