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CS5661EDW16

High Performance Dual Channel Current Mode Controller with ENABLE

Cherry semiconductor 

Typical Performance Characteristics: continued

Reference Voltage Change vs. Source Current

Reference Short Circuit Current vs. Temperature

0

VCC = 15V

-4.0

-8.0

TA = –55°C

-12

TA =

-16

25°C

TA = 125°C

-20

-24

0

20

40

60

80

100

120

I ref, REFERENCE SOURCE CURRENT (mA)

120

100

80

60-55

-25 0 25 50 75 100 125

TA, AMBIENT TEMPERATURE (°C)

Output Saturation Voltage vs. Load Current

Supply Current vs. Supply Voltage

0

VCC

-1.0

-2.0

SOURCE SATURATION

(LOAD TO GROUND)

VCC=15V

80µS PULSED LOAD

120Hz RATE

TA=25°C

TA= –55°C

2.0

1.0

0

0

TA= –55°C

TA=25°C

GND

SINK

SATURATION

(LOAD TO VCC)

200

400

600

800

OUTPUT LOAD CURRENT (mA)

32

RT=8.2kΩ

CT=3.3nF

24 VFB 1, 2=0V

CURRENT SENSE 1, 2=0V

TA=25°C

16

8.0

0

8.4

VCC, SUPPLY VOLTAGE (V) - CS-5661

Operating Description

The CS5661 is a high performance, fixed frequency, dual

channel current mode PWM controller for Off-Line and

DC to DC converter applications. Each channel contains a

high gain error amplifier, current sensing comparator,

pulse width modulator latch, and totem pole output driv-

er. The oscillator, reference, and undervoltage lockout cir-

cuits are common to both channels.

Oscillator

The oscillator has both precise frequency and duty cycle

control. The oscillator frequency is programmed by the

timing components RT and CT. Capacitor CT is charged

and discharged by an equal magnitude internal current

source and sink that generates a symmetrical 50 percent

duty cycle waveform at CT. The oscillator peak and valley

thresholds are 3.5V and 1.6V respectively. The source/

sink current is controlled by resistor RT. For proper opera-

tion over temperature range RT’s value should be between

4.0kΩ to 16kΩ.

As CT charges and discharges, an internal blanking pulse

is generated that alternately drives the inputs of the upper

and lower NOR gates high. This, in conjunction with a

precise amount of delay time introduced into each chan-

nel, produces well defined non-overlapping output duty

cycles. Output 2 is enabled while CT is charging, and

Output 1 is enabled during the discharge. Even at 500kHz,

each output is capable of approximately 44% duty cycle,

making this controller suitable for high frequency power

conversion applications.

In noise sensitive applications it may be necessary to syn-

chronize the converter with an external system clock. This

can be accomplished by applying an external clock signal.

For reliable synchronization, the oscillator frequency

should be set about 10% slower than the clock frequency.

The rising edge of the clock signal applied to SYNC, termi-

nates the charging of CT and VOUT2 conduction. By tailor-

ing the clock waveform symmetry, accurate duty cycle

clamping of either output can be achieved.

Error Amplifier

Each channel contains a fully-compensated error amplifier

with access to the output and inverting input. The amplifi-

er features a typical dc voltage gain of 100 dB, and a unity

gain bandwidth of 1.0 MHz with 71 degrees of phase mar-

gin. The non-inverting input is internally biased at 2.5V.

The converter output voltage is typically divided down

and monitored by the inverting input through a resistor

divider. The maximum input bias current is -1.0 µA which

will cause an output voltage error that is equal to the

product of the input bias current and the equivalent input

divider resistance.

Its output voltage is offset by two diode drops (≈1.4V) and

divided by three before it connects to the inverting input

of the current sense comparator. This guarantees that both

5

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