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TRSL-5380AWG Просмотр технического описания (PDF) - Optoway Technology

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TRSL-5380AWG Datasheet PDF : 5 Pages
1 2 3 4 5
Optoway
4
TRSL-5380WG
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CONNECTION DIAGRAM
PIN Symbol
Notes
PIN Symbol
Notes
1 VpdR Receiver power monitor. This pin must be 11 VccT +3.3V dc transmitter power supply
connected to a positive power supply (Vcc),
preferably via a small resistor. Supplier
photocurrent and maybe used to monitor receiver
power.
2 VeeR Receiver ground.
12 VeeT Transmitter ground.
3 VeeR Receiver ground.
13 T Dis Transmitter Disable. Connect this pin to logic 1
to disable module. To enable module connect to
logic low 0
4 NC No connected
14 TD + Transmitter Data In
5 NC No connected
15 TD Transmitter Data In Bar
6 VeeR Receiver ground.
16 VeeT Transmitter ground.
7 VccR +3.3V dc receiver power supply
17 BmonLaser Bias Monitoring Negative End
8 SD Signal detect. Logic 1 indicate a normal operation. 18 Bmon+ Laser Bias Monitoring Positive End
(Bmon+ - Bmon-) = 10 Ω X laser bias current
9 RDReceiver Dataout Bar
19 Pmon- Laser Power Monitoring -- Negative end
10 RD+ Receiver Dataout
20 Pmon+ Laser Power Monitoring -- Positive end
(Pmon+ - Pmon-) = 200 Ω X monitor photdiode
current
MS MS Mounting Studs. Connect to Chassis Ground
RECOMMENDED CIRCUIT SCHEMATIC
Tdis(LVTTL)
Bmon-
Bmon+
Pmon-
Pmon+
TX
RX
Vcc3.3V
MICROSTRIP1
Z=50R
MICROSTRIP2
Z=5OR
150ohm
TD-
TD+
150ohm
LVPECL
1uH
VCC3.3V
100nF
100nF
10uF
1uH
Vcc3.3V Vcc3.3V
PHY DEVICE
100nF 10uF
130R
RD+
Vcc3.3V
VCCRX(3.3V)
Vpdr
200R
10nF
3K
1K
MICROSTRIP3
Z=50R
MICROSTRIP4
Z=5OR
TO LVPECL STAGE
82R
130R
RD-
82R SD
LVPECL
Note: 1. TX input is terminated inside the module.
2. Veer and Veet are not internally connected to each other.
3. 50 Ω line pattern and component placements on TD+/TD- and RD+/RD- lines shall be symmetrical for better impedance
matching.
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OPTOWAY TECHNOLOGY INC. No.38, Kuang Fu S. Road, Hu Kou, Hsin Chu Industrial Park, Hsin Chu, Taiwan 303
Tel: 886-3-5979798
Fax: 886-3-5979737
E-mail: sales@optoway.com.tw http: // www.optoway.com.tw 12/1/2005 V3.0

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