W78354 Просмотр технического описания (PDF) - Winbond
Номер в каталоге
Компоненты Описание
Список матч
W78354 Datasheet PDF : 45 Pages
| |||
W78E354
Pin Description, continued
PIN NO.
68P 64P 48P 40P
PIN
NAME
36 34 26 23
37 35 - -
39 37 - -
40 38 - -
ADC0
ADC1
ADC2
(P1.6)
ADC3
(P1.7)
46 44 31 26
47 45 32 27
P1.0
P1.1
48 46 33 28
49 47 34 29
P1.2
(DSCL)
P1.3
(DSDA)
I/O
TYPE
I/P
I/O
I/O
TEST
NAME
-
-
-
-
FUNCTIONAL DESCRIPTION
Analog signal input channel to ADC.
Alternate function:
ADC2: P1.6 input (input only).
ADC3: P1.7 input (input only).
A13
A14
A13CTRL
A14CTRL
General purpose I/O.
Open-drain, Sink current 2mA.
Schmitt trigger I/P.
No PMOS ESD cell.
VIH = 3.0V (min), VIL = 1.5V (max)
---------------------------------------------------------
* In the Flash/RAM-test mode
(when the chip is in reset state):
P1.0 and P1.1: A13 and A14 inputs.
* In the functional test mode
(CPU executes out of ext. program memory):
P1.0 and P1.1: do not output A13 and A14, but function in
their normal operational state.
General purpose I/O.
Open-drain, Sink current 6mA.
Schmitt trigger I/P.
No PMOS ESD cell.
VIH = 3.0V (min), VIL = 1.5V (max)
Alternate function:
P1.2: DDC port serial clock DSCL.
P1.3: DDC port serial data DSDA.
---------------------------------------------------------
* In the Flash/RAM-test mode
(when the chip is in reset state):
P1.2: A13CTRL input.
P1.3: A14CTRL input.
Publication Release Date: April 1997
-5-
Revision A1
Share Link: 