74HC4050 Просмотр технического описания (PDF) - NXP Semiconductors.
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74HC4050 Datasheet PDF : 15 Pages
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NXP Semiconductors
74HC4050
Hex non-inverting HIGH-to-LOW level shifter
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8.
Symbol Parameter Conditions
Tamb = 25 C
Tamb = 40 C
to +85 C
Tamb = 40 C
to +125 C
Min Typ Max Min Max
Min
Max
CPD
power
CL = 50 pF; f = 1 MHz;
[3] -
14 -
-
-
-
-
dissipation VI = GND to VCC
capacitance
Unit
pF
[1] tpd is the same as tPLH and tPHL.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
11. Waveforms
9,
Q$ LQSXW
*1'
92+
Q< RXWSXW
92/
90
W3+/
90
W7+/
90
90
W3/+
W7/+
DDD
Fig 7.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
The input (nA) to output (nY) propagation delays
Table 8. Measurement points
Type
74HC4050
Input
VM
0.5VCC
Output
VM
0.5VCC
74HC4050
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 31 January 2013
© NXP B.V. 2013. All rights reserved.
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