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LT3796 Просмотр технического описания (PDF) - Linear Technology

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LT3796 Datasheet PDF : 32 Pages
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LT3796
PIN FUNCTIONS
ISP (Pin 1): Connection Point for the Positive Terminal
of the Current Feedback Resistor (RLED). Also serves as
positive rail for TG pin driver.
ISN (Pin 2): Connection Point for the Negative Terminal
of the Current Feedback Resistor (RLED).
TG (Pin 3): Top Gate Driver Output. An inverted PWM signal
drives series PMOS device between VISP and (VISP – 7V)
if VISP > 7V. An internal 7V clamp protects the PMOS gate
by limiting VGS. Leave TG unconnected if not used.
GND (Pins 4, 17, 21, 22, Exposed Pad Pin 29): Ground.
These pins also serve as current sense input for control
loop, sensing negative terminal of current sense resistor in
the source of the N-channel MOSFET. Solder the exposed
pad directly to ground plane.
ISMON (Pin 5): ISP/ISN Current Report Pin. The LED
current sensed by ISP/ISN inputs is reported as VISMON =
ILED • RLED • 4. Leave ISMON pin unconnected if not used.
When PWM is low, ISMON is driven to ground. Bypass
with a 47nF capacitor or higher if needed.
FB2 (Pin 6): Voltage Loop Feedback 2 Pin. This pin is
connected to the internal transconductance amplifier posi-
tive input node. The internal transconductance amplifier
with output VC regulates FB2 to 1.25V through the DC/
DC converter. If FB2 is driven above 1.3V, the TG pin is
pulled high to turn off the external PMOS and GATE pin is
driven to GND to turn off the external N-channel MOSFET.
Connect to GND if not used.
FB1 (Pin 7): Voltage Loop Feedback 1 Pin. FB1 is intended
for constant-voltage regulation or for LED protection/open
LED detection. The internal transconductance amplifier
with output VC regulates FB1 to 1.25V (nominal) through
the DC/DC converter. If the FB1 input is regulating the loop
and V(ISP-ISN) is less than 25mV (normal), the VMODE
pull-down is asserted. This action may signal an open
LED fault. If FB1 is driven above the 1.3V (by an external
power supply spike, for example), the FAULT pull-down is
asserted, the GATE pin is pulled low to turn off the external
N-channel MOSFET and the TG pin is driven high to protect
the LEDs from an overcurrent event. Do not leave the FB1
pin open. If not used, connect FB1 to GND.
VC (Pin 8): Transconductance Error Amplifier Output Pin.
Used to stabilize the control loop with an RC network.
This pin is high impedance when PWM is low, a feature
that stores the demand current state variable for the next
PWM high transition. Connect a capacitor between this
pin and GND; a resistor in series with the capacitor is
recommended for fast transient response. Do not leave
this pin open.
CTRL (Pin 9): Current Sense Threshold Adjustment Pin.
Regulating threshold V(ISP-ISN) is 0.25 • VCTRL plus an offset
for 0.1V < VCTRL < 1V. For VCTRL > 1.2V the current sense
threshold is constant at the full-scale value of 250mV. For
1V < VCTRL < 1.2V, the dependence of the current sense
threshold upon VCTRL transitions from a linear function
to a constant value, reaching 98% of full-scale value by
VCTRL = 1.1V. Connect CTRL to VREF for the 250mV default
current threshold. Do not leave this pin open. Pull CTRL
pin to GND for zero LED current.
VREF (Pin 10): Voltage Reference Output Pin. Typically
2.015V. This pin drives a resistor divider for the CTRL
pin, either for analog dimming or for temperature limit/
compensation of LED load. It can supply up to 100μA.
SS (Pin 11): Soft-Start Pin. This pin modulates oscillator
frequency and compensation pin voltage (VC) clamp. The
soft-start interval is set with an external capacitor. The pin
has a 28μA (typical) pull-up current source to an internal
2.5V rail. This pin can be used as fault timer. Provided the
SS pin has exceeded 1.7V, the pull-up current source is
disabled and a 2.8µA pull-down current enabled when any
one of the following fault conditions happen:
1. LED overcurrent
2. INTVCC undervoltage
3. Thermal limit
The SS pin must be discharged below 0.2V to reinitiate a
soft-start cycle. Switching is disabled until SS is recharged.
RT (Pin 12): Switching Frequency Adjustment Pin. Set the
frequency using a resistor to GND (for resistor values, see
the Typical Performance curve or Table 2). Do not leave
the RT pin open.
3796f
10

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