M24M01(2003) Просмотр технического описания (PDF) - STMicroelectronics

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M24M01
(Rev.:2003)

1 Mbit Serial I²C Bus EEPROM

STMicroelectronics 

M24M01

terminates the transfer by generating a Stop con-

dition, as shown in Figure 7.

Page Write

The Page Write mode allows up to 128 bytes to be

written in a single Write cycle, provided that they

are all located in the same ’row’ in the memory:

that is, the most significant memory address bits

(b16-b7) are the same. If more bytes are sent than

will fit up to the end of the row, a condition known

as ‘roll-over’ occurs. This should be avoided, as

data starts to become overwritten in an implemen-

tation dependent way.

The bus master sends from 1 to 128 bytes of data,

each of which is acknowledged by the device if

Write Control (WC) is Low. If Write Control (WC) is

High, the contents of the addressed memory loca-

tion are not modified, and each data byte is fol-

lowed by a NoAck. After each byte is transferred,

the internal byte address counter (the 7 least sig-

nificant address bits only) is incremented. The

transfer is terminated by the bus master generat-

ing a Stop condition.

Figure 7. Write Mode Sequences with WC=0 (data write enabled)

WC

BYTE WRITE

ACK

ACK

ACK

ACK

DEV SEL

BYTE ADDR BYTE ADDR

DATA IN

R/W

WC

PAGE WRITE

WC (cont'd)

PAGE WRITE

(cont'd)

ACK

ACK

ACK

ACK

DEV SEL

BYTE ADDR BYTE ADDR DATA IN 1

DATA IN 2

R/W

ACK

ACK

DATA IN N

AI01106C

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