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74HC4051D-Q100 Datasheet PDF : 31 Pages
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NXP Semiconductors
74HC4051-Q100; 74HCT4051-Q100
8-channel analog multiplexer/demultiplexer
7. Functional description
7.1 Function table
Table 3. Function table[1]
Input
Channel ON
E
S2
S1
S0
L
L
L
L
Y0 to Z
L
L
L
H
Y1 to Z
L
L
H
L
Y2 to Z
L
L
H
H
Y3 to Z
L
H
L
L
Y4 to Z
L
H
L
H
Y5 to Z
L
H
H
L
Y6 to Z
L
H
H
H
Y7 to Z
H
X
X
X
switches off
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
[1] 0.5
+11.0
V
IIK
input clamping current VI < 0.5 V or VI > VCC + 0.5 V
-
20
mA
ISK
switch clamping current VSW < 0.5 V or VSW > VCC + 0.5 V
-
20
mA
ISW
switch current
0.5 V < VSW < VCC + 0.5 V
-
25
mA
IEE
supply current
-
20
mA
ICC
supply current
-
50
mA
IGND
ground current
-
50
mA
Tstg
storage temperature
65
+150
C
Ptot
total power dissipation
[2] -
500
mW
P
power dissipation
per switch
-
100
mW
[1] To avoid drawing VCC current out of terminal Z, when switch current flows into terminals Yn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn, and in this case
there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or VEE.
[2] For SO16 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For TSSOP16 package: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K.
74HC_HCT4051_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 8 October 2012
© NXP B.V. 2012. All rights reserved.
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