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KK74HCT74A

Dual D Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS

Kodenshi Auk Co., LTD 

TECHNICAL DATA

Dual D Flip-Flop with Set and Reset

High-Performance Silicon-Gate CMOS

KK74HCT74A

The KK74HCT74A is identical in pinout to the LS/ALS74. This device

may be used as a level converter for interfacing TTL or NMOS outputs to

High Speed CMOS inputs.

This device consists of two D flip-flops with individual Set, Reset, and

Clock inputs. Information at a D-input is transferred to the corresponding Q

output on the next positive going edge of the clock input. Both Q and Q

outputs are available from each flip-flop. The Set and Reset inputs are

asynchronous.

• TTL/NMOS Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 µA

ORDERING INFORMATION

KK74HCT74AN Plastic

KK74HCT74AD SOIC

TA = -55° to 125° C for all packages

LOGIC DIAGRAM

PIN ASSIGNMENT

PIN 14 =VCC

PIN 7 = GND

FUNCTION TABLE

Inputs

Outputs

Set Reset Clock Data Q Q

LH

X

XH L

HL

X

XL H

L

L

X

X

H*

H*

HH

HH L

HH

LL H

HH

L

X No Change

HH

H

X No Change

HH

X No Change

*Both outputs will remain high as long as Set and

Reset are low, but the output states are

unpredictable if Set and Reset go high

simultaneously.

X = don’t care

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