MT8843 Просмотр технического описания (PDF) - Zarlink Semiconductor Inc
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MT8843 Datasheet PDF : 23 Pages
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MT8843
Pin Description
Pin # Name
Description
18
DR 3-wire Interface: Data Ready (CMOS Output). Active low. In mode 0 this output goes
low after the last DCLK pulse of each data word. This identifies the 8-bit word boundary
on the serial output stream. Typically, DR is used to latch 8-bit words from a serial-to-
parallel converter into a microcontroller. In mode 1 this pin will signal the availability of
data.
19
CD Carrier Detect (CMOS Output). Active low. A logic low indicates the presence of in-band
signal at the output of the FSK bandpass filter.
20 INT Interrupt (Open Drain Output). Active low. It is active when TRIGout or DR is low, or StD
is high. This output stays low until all three signals have become inactive.
21 StD Dual Tone Alert Signal Delayed Steering Output (CMOS Output). When high, it
indicates that a guard time qualified alert signal has been detected.
22 ESt Dual Tone Alert Signal Early Steering Output (CMOS Output). Alert signal detection
output. Used in conjunction with St/GT and external circuitry to implement the detect and
non-detect guard times.
23 St/GT Dual Tone Alert Signal Steering Input/Guard Time (Analog Input/CMOS Output).
A voltage greater than VTGt (see figure 4) at the St/GT pin causes the device to indicate
that a dual tone has been detected by asserting StD high. A voltage less than VTGt frees
the device to accept a new dual tone.
24
VDD Positive Power Supply.
baud BELL 202 and CCITT V.23 FSK demodulation.
The 3-wire serial data interface provided by CNIC
has been enhanced to operate in two modes. In the
CNIC compatible mode data transfer is initiated by
the device. A second mode allows a microcontroller
to extract 8-bit data words from the device.
Furthermore, CNIC2 offers Idle State Tone Alert
Signal and line reversal detection capability for BT’s
CLIP, ring burst detection for the U.K.’s CCA’s CLIP,
and ring detection for Bellcore’s CID.
Functional Overview
The MT8843 Calling Number Identification Circuit 2
(CNIC2) is a device compatible with BT, the U.K.’s
CCA and Bellcore specifications. As shown in Figure
1, CNIC2 provides an FSK demodulator as well as a
3-wire serial interface similar to that of it’s
predecessor, the MT8841 (CNIC). In CNIC2, the 3-
wire interface has been enhanced to provide two
modes of operation - a mode whereby data transfer
is initiated by the device and a mode whereby data
transfer is initiated by an external microcontroller.
In addition to supporting all the features and
functions offered by CNIC, CNIC2 provides line
reversal detection, ring detection and dual tone alert
signal detection capability. These new functions
eliminate some external circuitry previously required
with the MT8841 (CNIC).
The CNIC2 is compatible with caller identity
specifications produced by BT, the U.K.’s CCA, and
Bellcore.
BT specifications SIN227 and SIN242 specify the
signalling mechanism between a network and the
Terminal Equipment (TE) providing Caller Display
Service (CDS). CDS provides Calling Line Identity
Presentation (CLIP), that is, delivery of the identity of
the caller when a telephone call arrives, before the
start of ringing (in the Idle State).
An incoming CDS call is indicated by a polarity
reversal on the A and B wires (see figure 3), followed
by an Idle State Tone Alert Signal. Caller ID FSK
information is then transmitted in CCITT V.23 format.
CNIC2 has the capability to detect the line reversal,
tone alert signal, and demodulate the incoming
CCITT V.23 FSK signals.
The U.K.’s CCA specification TW/P&E/312 proposes
an alternate CDS TE interface. According to TW/
P&E/312, data is transmitted after a single burst of
ringing rather than before the first ringing cycle (as
specified in the BT standards). The Idle State Tone
Alert Signal is not required as it is replaced by a
single ring burst. CNIC2 has the capability to detect
the ring burst. It is also able to demodulate either
Bell-202 or CCITT V.23 FSK data following the ring
5-33
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