LTC2193 Просмотр технического описания (PDF) - Linear Technology
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LTC2193 Datasheet PDF : 28 Pages
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LTC2195
LTC2194/LTC2193
DIGITAL INPUTS AND OUTPUTS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
Single-Ended Encode Mode (ENC– Tied to GND)
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
High Level Input Voltage
VDD =1.8V
l
1.2
V
VIL
Low Level Input Voltage
VIN
Input Voltage Range
VDD =1.8V
ENC+ to GND
l
l
0
0.6
V
3.6
V
RIN
Input Resistance
See Figure 11
30
kΩ
CIN
Input Capacitance
(Note 8)
3.5
pF
DIGITAL INPUTS (CS, SDI, SCK in Serial or Parallel Programming Mode. SDO in Parallel Programming Mode)
VIH
High Level Input Voltage
VDD =1.8V
l
1.3
V
VIL
Low Level Input Voltage
VDD =1.8V
l
0.6
V
IIN
Input Current
VIN = 0V to 3.6V
l
–10
10
µA
CIN
Input Capacitance
(Note 8)
3
pF
SDO OUTPUT (Serial Programming Mode. Open-Drain Output. Requires 2k Pull-Up Resistor if SDO is Used)
ROL
Logic Low Output Resistance to GND
IOH
Logic High Output Leakage Current
COUT
Output Capacitance
DIGITAL DATA OUTPUTS
VDD =1.8V, SDO = 0V
SDO = 0V to 3.6V
(Note 8)
200
Ω
l
–10
10
µA
3
pF
VOD
Differential Output Voltage
100Ω Differential Load, 3.5mA Mode l 247
350
454
mV
100Ω Differential Load, 1.75mA Mode l 125
175
250
mV
VOS
Common Mode Output Voltage
100Ω Differential Load, 3.5mA Mode l 1.125
1.250
1.375
V
100Ω Differential Load, 1.75mA Mode l 1.125
1.250
1.375
V
RTERM
On-Chip Termination Resistance
Termination Enabled, OVDD = 1.8V
100
Ω
POWER REQUIREMENTS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 9)
SYMBOL PARAMETER
CONDITIONS
LTC2195
MIN TYP MAX
VDD
OVDD
IVDD
IOVDD
Analog Supply Voltage (Note 10)
l 1.7 1.8 1.9
Output Supply Voltage (Note 10)
l 1.7 1.8 1.9
Analog Supply Current Sine Wave Input
l
224 248
Digital Supply Current
2-Lane Mode, 1.75mA Mode l
2-Lane Mode, 3.5mA Mode l
4-Lane Mode, 1.75mA Mode l
4-Lane Mode, 3.5mA Mode l
16 20
27 32
23 27
42 49
PDISS
Power Dissipation
2-Lane Mode, 1.75mA Mode l
2-Lane Mode, 3.5mA Mode l
4-Lane Mode, 1.75mA Mode l
4-Lane Mode, 3.5mA Mode l
432 482
452 504
445 495
479 535
PSLEEP Sleep Mode Power
1
PNAP
Nap Mode Power
50
PDIFFCLK Power Increase with Diffential Encode Mode Enabled
20
(No Increase for Sleep Mode)
LTC2194
MIN TYP MAX
1.7 1.8 1.9
1.7 1.8 1.9
185 205
15 19
27 32
23 27
42 49
360 403
382 427
375 418
409 457
1
50
20
LTC2193
MIN TYP MAX
1.7 1.8 1.9
1.7 1.8 1.9
123 138
15 19
26 31
22 26
41 48
249 283
269 304
261 295
295 335
1
50
20
UNITS
V
V
mA
mA
mA
mA
mA
mW
mW
mW
mW
mW
mW
mW
219543f
5
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