LC72323 Просмотр технического описания (PDF) - SANYO -> Panasonic

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LC72323

Single-Chip Microcontroller with PLL and LCD Driver

SANYO -> Panasonic 

Continued from preceding page.

Pin

Pin No.

LC72323

Functions

I/O

Dedicated output port

PH0

10

Since these pins are high-breakdown voltage n-channel

PH1

PH2

9

8

transistor open-drain outputs, they can be effectively used for

functions such as band power supply switching.

Output

PH3

7

These ports go to the high impedance state during a reset,

i.e., when the RES pin is low, and in BACKUP mode.

PI0/S25

PI1/S26

PI2/S27

PI3/S28

Dedicated output port

While these pins have a CMOS output circuit structure, they

can be switched to function as LCD drivers. Their function is

switched by the SS and RS instructions. These pins cannot

39

be switched individually.

38

37

The LCD driver function is selected and a segment-off signal

is output when power is first applied or when RES is low.

Output

36

These pins are held at the low level in BACKUP mode.

Note that when the general-purpose port use option is

specified, these pins output the contents of IPORT when LPC

is 1, and the contents of the general-purpose output port

LATCH when LPC is 0.

S1 to S24

63 to 40

LCD driver segment outputs

A frame frequency of 100 Hz and a 1/2 duty, 1/2 bias drive

type are used.

A segment-off signal is output when power is first applied or

when RES is low.

These pins are held at the low level in BACKUP mode.

The use of these pins as general-purpose output ports can be

specified as an option.

Output

COM1

COM2

LCD driver common outputs

65

A 1/2 duty, 1/2 bias drive type is used.

64

The output when power is first applied or when RES is low is

identical to the normal operating mode output.

Output

These pins are held at the low level in BACKUP mode.

FMIN

AMIN

FM VCO (local oscillator) input

74

The input must be capacitor coupled.

The input frequency range is from 10 to 130 MHz.

AM VCO (local oscillator) input

Input

The band supported by this pin can be selected using the PLL

75

instruction.

High (2 to 40 MHz) → SW

Low (0.5 to 10 MHz) → LW and MW

I/O circuit type

Continued on next page.

No. 4950-8/13

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