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TEA1751LT Просмотр технического описания (PDF) - NXP Semiconductors.

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TEA1751LT Datasheet PDF : 31 Pages
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NXP Semiconductors
TEA1751LT
HV start-up flyback controller with integrated PFC controller
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Fig 4. Start-up sequence, normal operation and restart sequence
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7.1.2 Supply management
All internal reference voltages are derived from a temperature compensated and trimmed
on-chip band gap circuit. Internal reference currents are derived from a temperature
compensated and trimmed on-chip current reference circuit.
7.1.3 Latch input
The LATCH pin is a general-purpose input pin, which is used to switch off both converters.
The pin sources a current IO(LATCH) of 80 A. Switching off is stopped as soon as the
voltage on the latch drops below 1.25 V.
At initial start-up, switching is inhibited until the capacitor on the LATCH pin is charged
above 1.35 V. No internal filtering is done on this pin. An internal Zener clamp of 2.9 V
protects this pin from excessive voltages.
TEA1751LT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3. — 9 January 2013
© NXP B.V. 2013. All rights reserved.
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