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TEA1751LT

HV start-up DCM/QR flyback controller with integrated DCM/QR PFC controller

NXP Semiconductors. 

NXP Semiconductors

TEA1751LT

HV start-up flyback controller with integrated PFC controller

7. Functional description

7.1 General control

The TEA1751LT contains a controller for a power factor correction circuit as well as a

controller for a flyback circuit. The typical configuration is shown in Figure 3.

 











 



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Fig 3. TEA1751LT typical configuration

7.1.1 Start-up and UnderVoltage LockOut (UVLO)

Initially, the capacitor on the VCC pin is charged from the high-voltage mains using the HV

pin.

When VCC is less than Vtrip, the charge current is low. This low current protects the IC if

the VCC pin is shorted to ground. To ensure a short start-up time, the charge current above

Vtrip is increased until VCC reaches Vth(UVLO). When VCC is between Vth(UVLO) and Vstartup,

the charge current goes low again to ensure a low, safe restart duty cycle during fault

conditions.

The control logic activates the internal circuitry and switches off the HV charge current

when the voltage on pin VCC passes the Vstartup level. First, the LATCH pin current source

is activated and the soft-start capacitors on the PFCSENSE and FBSENSE pins are

charged.

When the LATCH pin voltage exceeds the Ven(LATCH) voltage, and the soft start capacitor

on the PFCSENSE pin is charged, the PFC circuit is activated.

If the soft-start capacitor on the FBSENSE pin is charged, the flyback converter is also

activated. The flyback converter output voltage is then regulated to its nominal output

voltage. The auxiliary winding of the flyback converter takes over the IC supply. See

Figure 4.

TEA1751LT

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3. — 9 January 2013

© NXP B.V. 2013. All rights reserved.

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