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UT1553B-RTRGX Просмотр технического описания (PDF) - Unspecified

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UT1553B-RTRGX
ETC
Unspecified ETC
UT1553B-RTRGX Datasheet PDF : 44 Pages
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1.5 MIL-STD-1553B Subaddress and Mode Code Definitions
Table 1: Subaddress and Mode Code Definitions Per MIL-STD-1553B
Subaddress Field
Binary (Decimal)
00000 (00)
00001 (01)
00010 (02)
00011 (03)
00100 (04)
00101 (05)
00110 (06)
00111 (07)
01000 (08)
01001 (09)
01010 (10)
01011 (11)
01100 (12)
01101 (13)
01110 (14)
01111 (15)
10000 (16)
10001 (17)
10010 (18)
10011 (19)
10100 (20)
10101 (21)
10110 (22)
10111 (23)
11000 (24)
11001 (25
11010 (26)
11011 (27)
11100 (28)
11101 (29)
11110 (30)
11111 (31)
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Description
Mode Code Indicator
Mode Code Indicator
Notes:
1. Refer to mode code assignments per MIL-STD-1553B
1.6 Terminal Address
The Terminal Address of the RTR is programmed via five
input pins: RTA(4:0) and RTPTY. Asserting MRST latches
the RTR’s Terminal Address from pins RTA(4:0) and parity
bit RTPTY. The address and parity cannot change until the
next assertion of the MRST. The parity of the Terminal
Address is odd; input pin RTPTY is set to a logic state to
satisfy this requirement. A logic 1 on Status Register bit 12
indicates incorrect Terminal Address parity. An
example follows:
RTA(4:0) = 05 (hex) = 00101
RTPTY = 1 (hex) = 1
Sum of 1’s = 3 (odd), Status Register bit 12 = 0
RTA(4:0) = 04 (hex) = 00100
RTPTY = 0 (hex) = 0
Sum of 1’s = 1 (odd), Status Register bit 12 = 0
RTR-9

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