LC4064ZE Просмотр технического описания (PDF) - Lattice Semiconductor
Номер в каталоге
Компоненты Описание
Список матч
LC4064ZE Datasheet PDF : 54 Pages
| |||
Lattice Semiconductor
ispMACH 4000ZE Family Data Sheet
Output Routing Pool (ORP)
The Output Routing Pool allows macrocell outputs to be connected to any of several I/O cells within an I/O block.
This provides greater flexibility in determining the pinout and allows design changes to occur without affecting the
pinout. The output routing pool also provides a parallel capability for routing macrocell-level OE product terms. This
allows the OE product term to follow the macrocell output as it is switched between I/O cells. The enhanced ORP of
the ispMACH 4000ZE family consists of the following elements:
• Output Routing Multiplexers
• OE Routing Multiplexers
Figure 7 shows the structure of the ORP from the I/O cell perspective. This is referred to as an ORP slice. Each
ORP has as many ORP slices as there are I/O cells in the corresponding I/O block.
Figure 7. ORP Slice
OE Routing Multiplexer
From PTOE
To I/O
Cell
OE
Output Routing Multiplexer
From Macrocell
To I/O
Cell
Output Routing Multiplexers
The details of connections between the macrocells and the I/O cells vary across devices and within a device
dependent on the maximum number of I/Os available. Tables 5-7 provide the connection details.
Table 5. GLB/MC/ORP Combinations for ispMACH 4256ZE
GLB/MC
[GLB] [MC 0]
[GLB] [MC 1]
[GLB] [MC 2]
[GLB] [MC 3]
[GLB] [MC 4]
[GLB] [MC 5]
[GLB] [MC 6]
[GLB] [MC 7]
ORP Mux Input Macrocells
M0, M1, M2, M3, M4, M5, M6, M7
M2, M3, M4, M5, M6, M7, M8, M9
M4, M5, M6, M7, M8, M9, M10, M11
M6, M7, M8, M9, M10, M11, M12, M13
M8, M9, M10, M11, M12, M13, M14, M15
M10, M11, M12, M13, M14, M15, M0, M1
M12, M13, M14, M15, M0, M1, M2, M3
M14, M15, M0, M1, M2, M3, M4, M5
8
Share Link: 