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MAX1203ACAP-T Просмотр технического описания (PDF) - Maxim Integrated

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MAX1203ACAP-T Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MAX1202/MAX1203
5V, 8-Channel, Serial, 12-Bit ADCs
with 3V Digital Interface
Electrical Characteristics (continued)
(VDD = +5V ±5%, VL = 2.7V to 3.6V; VSS = 0V or -5V ±5%; fSCLK = 2.0MHz, external clock (50% duty cycle); 15 clocks/conversion
cycle (133ksps); MAX1202—4.7μF capacitor at REF pin; MAX1203—external reference, VREF = 4.096V applied to REF pin; TA = TMIN
to TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
EXTERNAL REFERENCE AT REFADJ
Capacitive Bypass at REF
Internal compensation mode
External compensation mode
Reference-Buffer Gain
MAX1202
MAX1203
REFADJ Input Current
MAX1202
MAX1203
POWER REQUIREMENTS
Positive Supply Voltage
VDD
Negative Supply Voltage
VSS
MIN TYP MAX UNITS
0
µF
4.7
1.68
V/V
1.64
±50
µA
±5
5 ±5%
V
0 or 5
±5%
V
Operating mode
1.5 2.5
mA
Positive Supply Current
Negative Supply Current
Logic Supply Voltage
Logic Supply Current (Notes 6, 10)
Positive Supply Rejection (Note 11)
IDD
ISS
VL
IL
PSR
Fast power-down (Note 9)
Full power-down (Note 9)
Operating mode and fast power-down
Full power-down
VL = VDD = 5V
VDD = 5V ±5%; external reference, 4.096V;
full-scale input
30 70
µA
2
10
50
µA
10
2.70
5.25
V
10
µA
±0.06 ±0.5 mV
Negative Supply Rejection (Note 11)
Logic Supply Rejection (Note 12)
PSR
PSR
VSS = -5V ±5%; external reference, 4.096V;
full-scale input
External reference, 4.096V; full-scale input
±0.01 ±0.5 mV
±0.06 ±0.5 mV
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