V961PBC-40REVB2 Просмотр технического описания (PDF) - QuickLogic Corporation

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V961PBC-40REVB2

LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS

QuickLogic Corporation 

V961PBC

Notes:

1. Input leakage currents include high impedance output leakage for all bi-directional buffers with tri-state out-

puts.

2. Signals without pull-up resistors have greater than 3mA low output current. Signals requiring pull resistors

have greater than 6mA output current. The latter include FRAME, TRDY, IRDY, STOP, SERR, PERR.

3. Absolute maximum pin capacitance for a PCI unit is 10pF (except for CLK).

4. Lower capacitance on this input-only pin allows for non-resistive coupling to AD[xx].

3.2 Local Bus DC Specifications

Table 9: Local Bus Signals DC Operating Specifications

Symbol

Description

VIL

VIH

IIL

IIH

VOL4

Low level input voltage

High level input voltage

Low level input current

High level input current

Low level output voltage for 4 mA

outputs and I/O pins

VOH4

High level output voltage for 4 mA

outputs and I/O pins

IOZL

IOZH

Low level float input leakage

High level float input leakage

ICC (max) Maximum supply current

ICC (typ) Typical supply current

CIO Input and output capacitance

Conditions

VCC = 4.75V

VCC = 5.25V

VIN=GND, VCC=5.25V

VIN = VCC = 5.25V

IOL = -4 mA

Min Max Units

0.8 V

2.0

V

-10

µA

10 µA

0.4 V

IOH = 4 mA

2.4

V

VIN = GND

-10

µA

VIN = VCC

10 µA

VCC = 5.25V

PCLK = LCLK = 33MHz

150 mA

VCC = 5.0V

PCLK = LCLK = 33MHz

120 mA

10 pF

10

V961PBC Data Sheet Rev 2.4

Copyright © 1998, V3 Semiconductor Inc.

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