74LVC06A Просмотр технического описания (PDF) - NXP Semiconductors.
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74LVC06A Datasheet PDF : 14 Pages
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NXP Semiconductors
74LVC06A
Hex inverter with open-drain outputs
5.2 Pin description
Table 2. Pin description
Symbol
Pin
1A, 2A, 3A, 4A, 5A, 6A 1, 3, 5, 9, 11, 13
1Y, 2Y, 3Y, 4Y, 5Y, 6Y 2, 4, 6, 8, 10, 12
GND
7
VCC
14
6. Functional description
Description
data input
data output
ground (0 V)
supply voltage
Table 3.
Input
nA
L
H
Function selection [1]
Output
nY
Z
L
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
IIK
input clamping current
VI < 0
VI
input voltage
IOK
output clamping current
VO < 0
VO
output voltage
active mode
high-impedance mode
0.5
+6.5
V
50
-
mA
[1] 0.5
+6.5
V
50
-
mA
[2] 0.5
+6.5
V
[2] 0.5
+6.5
V
IO
ICC
IGND
Tstg
Ptot
output current
supply current
ground current
storage temperature
total power dissipation
VO = 0 V to VCC
Tamb = 40 C to +125 C
-
50
mA
-
100
mA
100
-
mA
65
+150
C
[3] -
500
mW
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO14 packages: above 70 C derate linearly with 8 mW/K.
For TSSOP14 packages: above 60 C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 C derate linearly with 4.5 mW/K.
74LVC06A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 10 November 2011
© NXP B.V. 2011. All rights reserved.
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