74LVC32ABQ-Q100X Просмотр технического описания (PDF) - NXP Semiconductors.

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74LVC32ABQ-Q100X

IC GATE OR 4CH 2-INP 14-DQFN

NXP Semiconductors. 

NXP Semiconductors

74LVC32A-Q100

Quad 2-input OR gate

5. Pinning information

5.1 Pinning

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Fig 4. Pin configuration for SO14 and (T)SSOP14

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(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no

electrical or mechanical requirement to solder this pad.

However, if it is soldered, the solder land should remain

floating or be connected to GND.

Fig 5. Pin configuration for DHVQFN14

5.2 Pin description

Table 2. Pin description

Symbol

Pin

1A, 2A, 3A, 4A

1, 4, 9, 12

1B, 2B, 3B, 4B

2, 5, 10, 13

1Y, 2Y, 3Y, 4Y

3, 6, 8, 11

GND

7

VCC

14

Description

data input

data input

data output

ground (0 V)

supply voltage

6. Functional description

Table 3. Function selection[1]

Input

nA

nB

L

L

X

H

H

X

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care

Output

nY

L

H

H

74LVC32A_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 28 February 2013

© NXP B.V. 2013. All rights reserved.

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