74LVC32AD Просмотр технического описания (PDF) - NXP Semiconductors.

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74LVC32AD

Quad 2-input OR gate

NXP Semiconductors. 

NXP Semiconductors

74LVC32A

Quad 2-input OR gate

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

D

c

y

Z

14

8

E

A

X

HE

vM A

pin 1 index

1

e

7

bp

wM

A2

A1

Q

(A 3)

A

θ

Lp

L

detail X

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT

A

max.

A1

A2

A3

bp

c

D (1) E (2) e

HE

mm

1.1

0.15

0.05

0.95

0.80

0.25

0.30

0.19

0.2

0.1

5.1

4.9

4.5

4.3

0.65

6.6

6.2

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

OUTLINE

VERSION

IEC

REFERENCES

JEDEC

JEITA

SOT402-1

MO-153

L

Lp

Q

v

w

y

Z (1) θ

1

0.75 0.4

0.50 0.3

0.2 0.13 0.1

0.72

0.38

8o

0o

EUROPEAN

PROJECTION

ISSUE DATE

99-12-27

03-02-18

Fig 10. Package outline SOT402-1 (TSSOP14)

74LVC32A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 5 — 17 November 2011

© NXP B.V. 2011. All rights reserved.

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