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ADV7480BBCZ

Dual Mode HDMI/MHL Receiver

Analog Devices 

Data Sheet

GENERAL DESCRIPTION

The ADV7480 is a combined HDMI®/MHL® receiver targeted at

connectivity enabled head units requiring a wired, uncompressed

digital audio/video link from smartphones and other consumer

electronics devices to support streaming and integration of

cloud-based multimedia content and applications into an

automotive infotainment system.

The ADV7480 MHL 2.1 capable receiver supports a maximum

pixel clock frequency of 75 MHz, allowing resolutions up to

720p/1080i at 60 Hz in 24-bit mode. The ADV7480 features a

link control bus (CBUS) that handles the link layer, translation

layer, CBUS electrical discovery, and display data channel

(DDC) commands. The implementation of the MHL sideband

channel (MSC) commands by the system processor can be

handled either by the I2C bus, or via a dedicated serial

peripheral interface (SPI) bus. A dedicated interrupt pin

(INTRQ3) is available to indicate that events related to CBUS

have occurred.

The ADV7480 also features an enable pin (VBUS_EN) to

dynamically enable or disable the output of a voltage regulator,

which provides a 5 V voltage bus (VBUS) signal to the MHL

source.

The ADV7480 HDMI capable receiver supports a maximum

pixel clock frequency of 162 MHz, allowing HDTV formats up

to 1080p, and display resolutions up to UXGA (1600 × 1200 at

60 Hz). The device integrates a consumer electronics control

(CEC) controller that supports the capability discovery and

control (CDC) feature. The HDMI input port has dedicated 5 V

detect and Hot Plug™ assert pins.

The HDMI/MHL receiver includes an adaptive transition

minimized differential signaling (TMDS) equalizer that ensures

robust operation of the interface with long cables.

The ADV7480 single receiver port is capable of accepting both

HDMI and MHL electrical signals. Automatic detection

between HDMI and MHL is achieved by using cable impedance

detection through the CD_SENSE pin.

ADV7480

The ADV7480 contains a component processor (CP) that

processes the video signals from the HDMI/MHL receiver. It

provides features such as contrast, brightness, and saturation

adjustments, as well as free run and timing adjustment controls

for HS/VS/DE timing.

The ADV7480 features an 8-bit digital input/output port,

supporting input and output video resolutions up to 720p/1080i

in both the 8-bit interleaved 4:2:2 SDR and DDR modes.

To enable glueless interfacing of these video input sources to the

latest generation of infotainment system on chips (SoCs), the

ADV7480 features a MIPI® CSI-2 transmitter. The four-lane

transmitter provides four data lanes, two data lanes, and one

data lane muxing options, and can be used to output video from

the HDMI receiver, the MHL receiver, and the digital input

port.

The ADV7480 offers a flexible audio output port for audio data

extracted from the MHL or HDMI streams. The HDMI/MHL

receiver has advanced audio functionality, such as a mute

controller that prevents audible extraneous noise in the audio

output. Additionally, the ADV7480 can be set to output time

division multiplexing (TDM) serial audio, which allows the

transmission of eight multiplexed serial audio channels on a

single audio output interface port.

The ADV7480 is programmed via a 2-wire, serial, bidirectional

port (I2C compatible).

Fabricated in an advanced CMOS process, the ADV7480 is

available in a 9 mm × 9 mm, RoHS-compliant, 100-ball

CSP_BGA package and is specified over the −40°C to +85°C

temperature range.

The ADV7480 is offered in automotive and industrial versions.

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