MX97103FC Просмотр технического описания (PDF) - Macronix International

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MX97103FC

ISDN S/T-PCI TRANSCEIVER

Macronix International 

MX97103

PIN DESCRIPTION

PAD#

42, 43, 45, 46, 48, 49,

51, 52, 56, 57, 59, 60,

62, 63, 65, 66, 80, 81,

83, 84, 86, 87, 89, 90,

93, 94, 96, 97, 99, 100,

2, 3

53, 68, 78, 92

PIN NAME

AD[31:0]

CBE[3:0]#

69

FRAME#

71

TRDY#

70

IRDY#

72

DEVSEL#

54

IDSEL

40

CLK

38

RST#

37

INTA#

75

PERR#

77

PAR

74

STOP#

23

BCL

22

SDS1

24

SDS2

19

FSC

20

DCL

18

DU

17

DD

34

SX1

35

SX2

29

SR2

30

SR1

27

XTAL1

26

XTAL2

9

LED2

15

LED1

TYPE

I/O

DESCRIPTION

PCI address/data bus.

I

PCI command/byte enable, command during address

phase, byte enable during data phase.

I

PCI FRAME# signal, asserted to indicate the start of a bus

transaction.

O

PCI Target ready, asserted by target agent.

I

PCI master ready, data transferred on the rising edge of

CLK when IRDY# and TRDY# both asserted.

O

PCI slave device select, specific for configuration cycle.

I

PCI Initialization device select, specific for configuration

cycle.

I

PCI clock, 33MHz

I

PCI bus reset

O/D

PCI bus interrupt request

I/O

PCI bus data error

I/O

PCI bus parity bit, even parity for AD and CBE

O

PCI stop signal

O

GCI bit clock, 768KHz

O

GCI serial data strobe 1, programmable strobe signal

O

GCI serial data strobe 2, programmable strobe signal

O(I)

GCI frame sync

O(I)

GCI data clock, 1.536MHz

I/O

GCI data upward to ST interface

I/O

GCI data downward from ST interface

O

S-bus transmitter output(positive)

O

S-bus transmitter output(negative)

I

S-bus receiver input

I

S-bus receiver reference

I

Connection for 7.68MHz crystal/oscillator input

O

Crystal output

O

Auxillisry LED output 0

O

Auxilliary LED output 1

P/N:PM0564

REV. 1.0, FEB. 23, 1999

3

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