MX97102 Просмотр технического описания (PDF) - Macronix International

Номер в каталоге

Компоненты Описание

Список матч

MX97102

ISDN S/T CONTROLLER

Macronix International 

MX97102

FSC1

125 us

IPD0

(DD)

CH0

CH1

B1

B2 MONO D CIO

IC1

IC2 MON1 CI1

MR MX

MR MX

IPD1

(DU)

B1

B2 MONO D CIO

IC1

IC2 MON1 CI1

MR MX

MR MX

SDS1

CH2

S/G A/B

BAC TAD

IDP0,1:768 kbit/s

DCL :1536 kHz

FSC1 :8 kHz

BCL :768 kHz bit clock

SDS1 :8kHz programmable data strobe signal for

selecting one or both B/IC channel(s)

Figure 6-1 Frame structure of GCI

The GCI interface is operated in the “open drain” mode

in order to takes advantage of the bus capability. In this

case pull-up resisters (1kohm-5kohm) are required on

PIDP0 and PIDP1.

GCI OFF Function

In GCI terminal mode (SPCR:SPM=0) the GCI inter-

face can be switched off for external devices via IOF bit

in ADF1 register. If IOF=1, the interface is switched off.

Thus, DCL, FSC1, IDP0/1 and BCL are high impedence.

GCI Direction Control

For test applications, the direction of IDP0 (DD) and

IDP1 (DU) can be reversed during certain time-slots

within the GCI frame. This is performed via the IDC bit

in the SQXR register. For normal operation SQXR:IDC

should be set to “ 0 ” .

GCI has the 12-byte frame structure consisting of chan-

nels 0, 1 and 2. (see figure 6-1 above)

- IDP0 carries the 2B+D channels from the S/T inter-

face, and the MONITOR 0 and C/I 0 channels coming

from the S/T controller;

- IDP1 carries the MONITOR 0 and C/I 0 channels to

the layer-1.

Channel 1 of GCI interface is used for internal commu-

nication in terminal applications. Two cases have to be

distinguished, according to whether the MX97102 is op-

erated as a master device or as a slave device.

P/N:PM0473

REV. 2.5, SEP. 05, 2000

11

Share Link: