MAX8704 Просмотр технического описания (PDF) - Maxim Integrated

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MAX8704

High-Current, Low-Voltage Linear Regulator with Power-Limited, External MOSFET

Maxim Integrated 

High-Current, Low-Voltage Linear Regulator

with Power-Limited, External MOSFET

that provide on-resistance specifications with a 1.8V

gate-to-source voltage.

MOSFET Power Dissipation

The maximum power dissipation of the MAX8704

depends on the thermal resistance of the external n-

channel MOSFET package, the board layout, the tem-

perature difference between the die and ambient air,

and the rate of airflow. The power dissipated in the

MOSFET is:

PDIS = IOUT x (VIN - VCSP)

The maximum power dissipation allowed is determined

by the following formula:

RDIS(MAX)

=

TJ(MAX) − TA

θJC + θCA

where TJ(MAX) is the maximum junction temperature

(+150°C), TA is the ambient temperature, θJC is the ther-

mal resistance from the die junction to the package

case, and θCA is the thermal resistance from the case

through the PC board, copper traces, and other materi-

als to the surrounding air. Standard SO-8 MOSFETs are

typically rated for 2W, while new power packages

(PowerPAK, DirectFET, etc.) can achieve power dissipa-

tion ratings as high as 5W. For optimum power dissipa-

tion, use a large ground plane with good thermal contact

to ground and use wide input and output traces. Extra

copper on the PC board increases thermal mass and

reduces the thermal resistance of the board.

Setting the Current Limit

The current-sense voltage threshold is preset to 50mV

(typ), so the achievable peak source current (IPEAK) is

determined by the current-sense resistor. The current-

sense resistor can be determined by:

RSENSE = VCSLIMIT / IPEAK

For the best current-sense accuracy, use a 1% current-

sense resistor between the source of the MOSFET and

the output.

Setting the Power Limit

The MAX8704 includes a unique power-limit protection

circuit that limits the maximum power dissipation in the

external MOSFET. An external resistor (RPLIM) adjusts the

actual power limit as defined by the following equation:

RPLIM

=

PLIMIT

VPWRLIMIT

× KPLIM × RSENSE

where RSENSE is the current-sense resistor, PLIMIT is the

maximum MOSFET power dissipation, the power-limit

OUTPUT CAPACITANCE

vs. LOAD CURRENT

50

VIN > VOUT + 0.2V

40

30

20

10

0

1

2

3

4

5

LOAD CURRENT (A)

Figure 4. Output Capacitance vs. Load Current

conversion gain (KPLIM) equals 200µA/V2, and the

power-limit threshold (VPWRLIMIT) equals 1.0V. An exter-

nal capacitor (CPLIM) adjusts the power-limit time con-

stant (τPLIM = RPLIM x CPLIM), allowing short high-power

transients while protecting against thermal stress.

Short PLIM to ground to disable the power-limit protection.

Input Capacitor Selection (CIN)

Typically, the linear regulator is powered from the out-

put of a step-down regulator, effectively providing a

low-impedance source for the MAX8704. Under these

conditions, a local 10µF or greater ceramic capacitor is

sufficient for most applications. If the linear regulator is

connected to a high-impedance input, low-ESR poly-

mer capacitors are recommended on the input.

Output Capacitor Selection (COUT)

The MAX8704 requires 10µF/A or greater ceramic

capacitor for stable operation and optimized load-tran-

sient response. For higher capacitance values, the reg-

ulator remains stable with low-ESR, polymer output

capacitors as shown in the Output Capacitance vs.

Load Current graph (see Figure 4). When selecting the

output capacitor to provide good transient response,

the capacitor’s ESR should be minimized:

∆VOUT = ∆IOUT x ESR

where ∆IOUT is the maximum peak-to-peak load current

step, and ∆VOUT is the transient output-voltage tolerance.

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