CL-PS7110 Просмотр технического описания (PDF) - Cirrus Logic

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CL-PS7110

Low-Power System-on-a-Chip

Cirrus Logic 

CL-PS7110

Low-Power System-on-a-Chip

FEATURES (cont.)

s ROM/SRAM/flash memory control

— Decodes eight separate memory segments of 256

Mbytes

— Each segment can be configured as 8, 16, or 32 bits

wide and support page-mode access

— Programmable access time for conventional

SRAM/ROM/flash memory

— Expansion device can also be a PC Card (PCMCIA)

controller

s Codec interface

— Provides all necessary clocks and timing pulses and

performs serialization of the data stream (or vice versa)

to or from standard telephony codecs

— Data transfer at 64 kbps

s Synchronous serial interface

— Supports SPI®1 or Microwire®2-compatible interface

s 36-bit general-purpose I/O

— Four 8-bit and one 4-bit GPIO port

— Supports scanning keyboard matrix

1 SPI is a registered trademark of Motorola®.

2 Microwire is a registered trademark of National Semicon-

ductor®.

s 16C550-style UART

— Supports bit rates up to 115.2 kbps

— Contains two 16-byte FIFOs for Tx and Rx

— Supports modem control signals

s SIR (slow (9600–115.2 kbps) infrared) encoder

— IrDA (Infrared Data Association) SIR protocol encoder

can be optionally switched into Tx and Rx signals of the

UART up to 115 kbps

s DC-to-DC converter interface

— Provides two 96-kHz clock outputs, whose duty ratio are

programmable (from 1-in-16 to 15-in-16)

s LCD controller

— Interfaces directly to a single-scan panel monochrome

LCD

— Panel size is programmable and is any width (line length)

from 16 to 1024 pixels in 16-pixel increments

— Video frame size programmable up to 128 Kbytes

— Bits per pixel programmable from 1, 2, or 4

— Two 32-bit palette registers to support 4-, 2-, or 1-bit pixel

values for mapping to any of the 16 grayscale values

s Two timer counters

s Realtime clock (32-bit)

OVERVIEW (cont.)

level of performance offered by a 33-MHz Intel® ’486-

based PC.

system. The system can have an 8-bit-wide boot

option to optimize memory size.

As shown in the system block diagram, simply adding

desired memory and peripherals to the highly inte-

grated CL-PS7110 completes a hand-held orga-

nizer/PDA system board. All the interface logic is

integrated on-chip.

The CL-PS7110 is packaged in a 208-pin VQFP

package, with a body size of 28-mm square, lead

pitch of 0.5 mm, and thickness of 1.4 mm.

Memory Interface

There are two main external memory interfaces and

a DMA controller that fetches video display data for

the LCD controller from main DRAM memory.

The SRAM/ROM-style interface has programmable

wait state timings and includes burst-mode capability,

with eight chip selects decoding eight 256-Mbyte

sections of addressable space. For maximum flexibil-

ity, each bank can be specified to be 8, 16 or 32 bits

wide to enable the use of low-cost memory in a 32-bit

The DRAM interface allows direct connection of up

to 4 banks of DRAM, each bank containing up to

256 Mbytes. To assure the lowest possible power

consumption, the CL-PS7110 supports self-refresh

DRAMs, which are placed a low-power state by the

device when it enters its low-power standby mode.

Serial Interface

For RS232 serial communications, the CL-PS7110

includes a UART with two 16-byte FIFOs for receive

and transmit data. The UART supports bit rates of

up to 115.2 kbps. An IrDA SIR protocol

encoder/decoder can be optionally switched into the

Rx/Tx signals to/from the UART to enable these sig-

nals to drive an infrared communication interface

directly.

A full-duplex codec interface allows direct connec-

tion of a standard codec chip to the CL-PS7110,

allowing storage and playback of sound.

2

May 1997

DATA BOOK v1.5

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