CS7666-KQ Просмотр технического описания (PDF) - Cirrus Logic

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CS7666-KQ

Digital Color-Space Processor for CCD Cameras

Cirrus Logic 

CS7666

CLKIN2X

t S2

CLKIN

Mosaic

Input Data

DI[9:0]

t H2

t S1 t H1

Input Timing Diagram

CLKOUT

Output Data

DOA[9:0]

DOB[9:0]

tPD

t OH

Output Timing Diagram

CONTROL PORT CHARACTERISTICS

(TA = 25 °C; VDD = 5 V; Input Levels: logic 0 = 0 V, logic 1 = VDD.)

Parameter

Symbol

Min

SCL Clock Frequency

Bus Free Time Between Transmissions

Start Condition Hold Time

Clock Pulse Width

Setup Time for Repeat Start Condition

SDAIN Hold Time from SCL Falling

SDAIN Setup Time from SCL Rising

SDAIN and SCL Rise Time

SDAIN and SCL Fall Time

Setup Time for Stop Condition

fSCL

-

tbuf

1.3

thdst

0.6

High

thigh

0.6

Low

tlow

1.3

tsust

0.6

thdd

0

tsud

0.1

tr

-

tf

-

tsusp

0.6

Stop Start

Repeated

Start

SDA

SCL

t buf

t hdst

t high

t hdst

tf

t low t hdd

t sud

t sust

tr

I2C Timing Diagram

Max

Unit

400

kHz

-

µs

-

µs

-

µs

-

µs

-

µs

-

µs

-

µs

1.0

µs

0.3

µs

-

µs

Stop

t susp

4

DS302PP1

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