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2330AKEC Просмотр технического описания (PDF) - Cadeka Microcircuits LLC.

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2330AKEC
CADEKA
Cadeka Microcircuits LLC. CADEKA
2330AKEC Datasheet PDF : 18 Pages
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TMC2330A
PRODUCT SPECIFICATION
Table 1. Data Input/Output Formats—Integer Format
Port
XRIN
XRIN
XRIN
YPIN
YPIN
YPIN
Bit #
RTP TCXY
31 30 29 … 16 15 14 … 0
Format
0
X
1
0
1
1
215 214
20
U
NS 214 20
S
–215 214
20
T
0
X
±20 2-1
2-2
2-15 2-16 2-17 2-31
(xπ)T/U
1
0
NS 214 213
20
S
1
1
–215 214 213
20
T
RXOUT
RXOUT
RXOUT
PYOUT
PYOUT
PYOUT
0
0
0
1
1
X
0
0
0
1
1
X
NS 214
–215 214
215 214
NS 214
–215 214
±20 2-1
20
S
20
T
20
U
20
S
20
T
2-15 (xπ)T/U
Table 2. Data Input/Output Formats—Fractional Format
Port
Bit #
RTP TCXY 31 30 29 … 16 15 14 … 0
Format
XRIN
XRIN
XRIN
0
X
1
0
1
1
20
2-1
2-15
U
NS 2-1 2-15
S
–20 2-1
2-15
T
YPIN
YPIN
YPIN
0
X
±20 2-1
2-2
2-15 2-16 2-17 2-31
(xπ)T/U
1
0
NS 2-1
2-2
2-15
S
1
1
-20
2-1
2-2
2-15
T
RXOUT
RXOUT
RXOUT
0
0
0
1
1
X
NS 2-1 2-15
S
–20 2-1
2-15
T
20
2-1
2-15
U
PYOUT
PYOUT
PYOUT
0
0
0
1
1
X
NS 2-1 2-15
S
–20 2-1
2-15
T
±20 2-1 2-15 (xπ)T/U
Notes:
1. -215 denotes two’s complement sign bit.
2. NS denotes negative sign, i.e., ‘1’ negates the number.
3. ±20 denotes two’s complement sign or highest magnitude bit – since phase angles are modulo 2π and phase accumulator is
modulo 232, this bit may be regarded as +π or -π.
4. All phase angles are in terms of π radians, hence notation “xπ.”
5. If ACC = 00, YPIN(15-0) are “don’t cares.”
6. Formats:
T = Two’s Complement
S = Signed Magnitude
U = Unsigned
HEX
FFFF
8001
8000
7FFF
0001
0000
U
65535
32769
32768
32767
1
0
T
–1
-32767
-32768
32767
1
0
S
-32767
-1
0
32767
1
0
REV. 1.1.8 10/31/00
3

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