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ISPGDX80A-5Q208 Просмотр технического описания (PDF) - Lattice Semiconductor

Номер в каталоге
Компоненты Описание
производитель
ISPGDX80A-5Q208
Lattice
Lattice Semiconductor Lattice
ISPGDX80A-5Q208 Datasheet PDF : 25 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Specifications ispGDX Family
Switching Test Conditions
Input Pulse Levels
Input Rise and Fall Time
Input Timing Reference Levels
GND to 3.0V
1.5ns 10% to 90%
1.5V
Output Timing Reference Levels
1.5V
Output Load
See figure at right
3-state levels are measured 0.5V from steady-state
active level.
Device
Output
+ 5V
R1
R2
Test
Point
CL*
Output Load Conditions
TEST CONDITION
A
Active High
B
Active Low
Active High to Z
C
at VOH -0.5V
Active Low to Z
at VOL+0.5V
R1
160
160
160
DC Electrical Characteristics
R2
CL
9035pF
9035pF
9035pF
905pF
905pF
Table 2 - 0004A
*CL includes Test Fixture and Probe Capacitance.
Over Recommended Operating Conditions
SYMBOL
PARAMETER
CONDITION
MIN. TYP.2 MAX. UNITS
VOL
VOH
IIL
IIH
IIL-isp
IIL-PU
IOS1
ICCQ
ICC
Output Low Voltage
Output High Voltage
Input or I/O Low Leakage Current
Input or I/O High Leakage Current
ispEN Input Low Leakage Current
I/O Active Pull-Up Current
Output Short Circuit Current
Quiescent Power Supply Current
Dynamic Power Supply Current
per Input Switching
IOL =24 mA
IOH =-24 mA
0V VIN VIL (MAX.)
3.5V VIN VCC
0V VIN VIL (MAX.)
0V VIN VIL
VCC = 5V, VOUT = 0.5V, TA = 25˚C
VIL = 0.5V, VIH = VCC
One input toggling @ 50% duty cycle,
outputs open.
2.4
-100
25
See
Note 3
0.55
-10
10
-150
-150
-250
40
V
V
µA
µA
µA
µA
mA
mA
mA/MHz
1. One output at a time for a maximum duration of one second. VOUT = 0.5V was selected to avoid test problems by tester ground
degradation. Characterized but not 100% tested.
2. Typical values are at VCC = 5V and TA = 25oC.
3. ICC / MHz = (0.0114 x I/O cell fanout) + 0.06
e.g. An input driving four I/O cells at 40 MHz results in a dynamic I CC of approximately ((0.0114 x 4) + 0.06) x 40 = 4.2 mA.
7

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