RS5C372A Просмотр технического описания (PDF) - RICOH Co.,Ltd.

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RS5C372A

I2C bus SERIAL INTERFACE REAL-TIME CLOCK ICs

RICOH Co.,Ltd. 

RS5C372A/B

(A) course

Adjustment of clock is not made for IC (no adjustment) and any CL value may be used for the crystal oscillator. Pre-

cision fluctuations of a crystal oscillator may be selected as long as clock precision allows. Obtain the central fre-

quency as described in section 2.2 using several crystal oscillator and ICs, determine an adjustment value as

described in “2.4 Time Trimming Circuit” which shall be set to the RS5C372A/B.

(B) course

To keep clock precision within the range of (fluctuation in crys-tal oscillator + fluctuation in IC), clock shall be

adjustment is required for each IC. On adjusting procedures see “2.4 Time Trimming Circuit.” Available selection

range for the frequency precision fluctuations and CL (load capacitance) for a crystal oscillator may be widened by

adjusting clock frequency. Obtain the central frequency as described in section 2.2 using the crystal oscillator and

IC to be used, determine if an adjustment is possible or not using the clock adjustment circuit, perform adjustment

for each IC using the clock adjustment circuit. Up to ±1.5ppm may be adjusted at a room temperature.

(C) course

In (C) and (D) courses, adjustment of 32-kHz clock output frequency as well as clock is necessary. Frequency

adjustment for the crystal oscillator is made by adjusting both of CG and CD connected to the both ends of the oscil-

lator. Since the RS5C372A/B incorporate the CG and CD, oscillating frequency is required using CL of the crystal

oscillator as the reference.

Generally, relation between CL and CG or CD is as follows:

CG × CD

CL =

+ CS

CG + CD

CS : Board floating capacitance

Although a crystal oscillator having CL value of around 6 to 8pF is recommended for the RS5C372A/B, measure

oscillation frequency as described in section 2.2 and if frequency is high (clock gains) switch to a crystal oscillator

with smaller CL while if frequency is small (clock loses) switch to an oscillator with larger CL. Using these proce-

dures select a crystal oscillator with optimal CL and set unadjusted value to the clock adjustment circuit. (See section

2.4, “Time Trimming Circuit”.) We recommend to consult the crystal manufacturer on compatibility of CL values.

High oscillation frequency (clock gains) may be adjusted by externally adding CGOUT as shown below.

RS5C372A/B

VDD

VDD

8

RF

CG

RD CD

OSCIN

7

32kHz

* CGOUT 1

6

OSCOUT

*1) CGOUT shall be from 0 to 15pF.

(D) course

Select a crystal oscillator as in the (C) course, then adjust clock error for each IC as in (B) course. For clock adjust-

ing procedures, see “2.4 Time Trimming Circuit.”

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