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HEF4794B Просмотр технического описания (PDF) - NXP Semiconductors.

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HEF4794B
NXP
NXP Semiconductors. NXP
HEF4794B Datasheet PDF : 18 Pages
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NXP Semiconductors
HEF4794B
8-stage shift-and-store register LED driver
Table 7. Dynamic characteristics …continued
VSS = 0 V; Tamb = 25 C unless otherwise specified. For test circuit, see Figure 10.
Symbol Parameter
Conditions
VDD
Extrapolation formula
tW
pulse width
CP; LOW and
HIGH;
see Figure 6
5V
10 V
15 V
STR; HIGH;
see Figure 7
5V
10 V
15 V
tsu
set-up time
D to CP;
see Figure 9
5V
10 V
15 V
th
hold time
D to CP;
see Figure 9
5V
10 V
15 V
fclk(max) maximum clock
frequency
CP; see Figure 6 5 V
10 V
15 V
Min Typ
60 30
30 15
24 12
80 40
60 30
24 12
60 30
20 10
15 5
+5 15
20 5
20 5
5
10
11 22
14 28
Max Unit
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
MHz
-
MHz
-
MHz
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2] ten is the same as tPZL and tdis is the same as tPLZ
[3] tt is the same as tTLH and tTHL
Table 8. Dynamic power dissipation
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.
Symbol Parameter
VDD Typical formula
PD
dynamic power dissipation 5 V PD = 1200 fi + (fo CL) VDD2 W
10 V PD = 5550 fi + (fo CL) VDD2 W
15 V PD = 15000 fi + (fo CL) VDD2 W
Where
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
(fo CL) = sum of the outputs;
VDD = supply voltage in V.
HEF4794B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 16 November 2011
© NXP B.V. 2011. All rights reserved.
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