74HC164 Просмотр технического описания (PDF) - System Logic Semiconductor
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74HC164
System Logic Semiconductor
74HC164 Datasheet PDF : 5 Pages
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SL74HC164
AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)
Symbol
Parameter
VCC
Guaranteed Limit
V 25 °C to ≤85°C ≤125°C Unit
-55°C
fmax Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
2.0 6.0
4.8
4.0 MHz
4.5 30
24
20
6.0 35
28
24
tPLH, tPHL Maximum Propagation Delay,Clock to Q (Figures 1 2.0 175
220
265
ns
and 4)
4.5 35
44
53
6.0 30
37
45
tPHL Maximum Propagation Delay,Reset to Q (Figures 2 2.0 205
255
310
ns
and 4)
4.5 41
51
62
6.0 35
43
53
tTLH, tTHL Maximum Output Transition Time, Any Output
2.0 75
95
110
ns
(Figures 1 and 4)
4.5 15
19
22
6.0 13
16
19
CIN
Maximum Input Capacitance
-
10
10
10
pF
Power Dissipation Capacitance (Per Package)
CPD Used to determine the no-load dynamic power
consumption:
PD=CPDVCC2f+ICCVCC
Typical @25°C,VCC=5.0 V
140
TIMING REQUIREMENTS (CL=50pF,Input tr=tf=6.0 ns)
VCC
Symbol
Parameter
V
tSU
Minimum Setup Time,A1 or A2 2.0
to Clock (Figure 3)
4.5
6.0
th
Minimum Hold Time, Clock to 2.0
A1 or A2 (Figure 3)
4.5
6.0
trec
Minimum Recovery Time,
2.0
Reset Inactive to Clock (Figure 4.5
2)
6.0
tw
Minimum Pulse Width, Reset
2.0
(Figure 2)
4.5
6.0
tw
Minimum Pulse Width, Clock
2.0
(Figure 1)
4.5
6.0
tr, tf Maximum Input Rise and Fall
2.0
Times (Figure 1)
4.5
6.0
25 °C to
-55°C
50
10
9
5
5
5
5
5
5
80
16
14
80
16
14
1000
500
400
Guaranteed Limit
≤85°C
65
13
11
5
5
5
5
5
5
100
20
17
100
20
17
1000
500
400
≤125°C
75
15
13
5
5
5
5
5
5
120
24
20
120
24
20
1000
500
400
pF
Unit
ns
ns
ns
ns
ns
ns
SLS
System Logic
Semiconductor
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