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MB40C318 Просмотр технического описания (PDF) - Fujitsu

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MB40C318 Datasheet PDF : 16 Pages
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MB40C318
s TIMING CHART 2
Differential CLK input-demultiplex output (in-phase) mode
• CLKEP = CLKEN = 140 MHz (max)
• CLKA = CLKB = “L” (DVSS)
• CKSEL = “H” (AVDD)
• DSEL = “L” (DVSS)
• CE = “L” (AVSS)
• OE = “L” (DVSS)
VIHD
Differential
CLK input VILD
tr
tf
T
DVDDI 1.1 V
tWS+ tWS
DVDDI 1.45 V
N3 N2 N1 N
N + 1 N + 2 N + 3 N + 4 N + 5 N + 6 N + 7 N + 8 N + 9 N + 10
VINA input
tAD
N9 N9
VOHD or N 10 or N 8
DA0 to DA7
VOLD
N7
or N 8
N5
or N 6
N 10 N 10 N 8 N 8
VOHD or N 11 or N 9 or N 9 or N 7
DB0 to DB7
VOLD
N6
or N 7
VOHD
CLKOA
VOLD
N3
or N 4
N4
or N 5
tpdM1(max)
tpdM1(typ)
tpdM1(min)
N1
or N 2
tpdM1(max)
tpdM1(typ)
N+1
DVDD 0.4 V
0.4V
N+3
tpdM1(min)
N
N2
or N 3
DVDD 0.4 V
0.4V
tpdM1O(max)
tpdM1O(typ)
N+2
tpdM1O(min)
DVDD 0.4 V
0.4 V
VOHD
CLKOB
VOLD
VIHD
RESET input
VILD
th tS th tS
1.5 V
ALL “L” fix
• Differential CLK input — Solid line: CLKEP, Dotted line: CLKEN
• VINA input — Sampling at CLKEP rising (CLKEN falling)
• DA0 to DA7 — Output (after 5 CLK + tpdM1 from Sampling) at CLKEP rising (CLKEN falling)
• DB0 to DB7 — Output (after 6 CLK + tpdM1 from Sampling) at CLKEP rising (CLKEN falling)
10

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