SIC402A Просмотр технического описания (PDF) - Vishay Semiconductors

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SIC402A

10 A microBUCK® SiC402A/B Integrated Buck Regulator with Programmable LDO

Vishay Semiconductors 

www.vishay.com

PIN CONFIGURATION (Top View)

SiC402A, SiC402BCD

Vishay Siliconix

FB 1

VOUT 2

VDD 3

AGND 4

FBL 5

VIN 6

SS 7

BST 8

32 31 30 29 28 27 26 25

PAD 1

AGND

PAD 2

VIN

PAD 3

LX

24 LX

23 LX

22 PGND

21 PGND

20 PGND

19 PGND

18 PGND

17 PGND

PIN DESCRIPTION

PIN NUMBER

SYMBOL

1

FB

2

3

4, 30, PAD 1

5

6, 9 to 11, PAD 2

7

8

12, 14

13

23 to 25, PAD 3

15 to 22

26

27

28

VOUT

VDD

AGND

FBL

VIN

SS

BST

NC

LXBST

LX

PGND

PGOOD

IILIM

LXS

29

EN/PSV

31

tON

32

ENL

SiC402A/B Pin Configuration (Top View)

DESCRIPTION

Feedback input for switching regulator used to program the output voltage - connect to an external

resistor divider from VOUT to AGND.

Switcher output voltage sense pin - also the input to the internal switch-over between VOUT and

VLDO. The voltage at this pin must be less than or equal to the voltage at the VDD pin.

Bias supply for the IC - when using the internal LDO as a bias power supply, VDD is the LDO output.

When using an external power supply as the bias for the IC, the LDO output should be disabled.

Analog ground

Feedback input for the internal LDO - used to program the LDO output. Connect to an external

resistor divider from VDD to AGND.

Input supply voltage

The soft start ramp will be programmed by an internal current source charging a capacitor on this pin.

Bootstrap pin - connect a capacitor of at least 100 nF from BST to LX to develop the floating supply

for the high-side gate drive.

No connection

LX Boost - connect to the BST capacitor.

Switching (phase) node

Power ground

Open-drain power good indicator - high impedance indicates power is good. An external pull-up

resistor is required.

Current limit sense pin - used to program the current limit by connecting a resistor from ILIM to LXS.

LX sense - connects to RILIM

Enable/power-save input for the switching regulator - connect to AGND to disable the switching

regulator, connect to VDD to operate with power-save mode and float to operate in forced

continuous mode.

On-time programming input - set the on-time by connecting through a resistor to AGND.

Enable input for the LDO - connect ENL to AGND to disable the LDO. Drive with logic signal for logic

control, or program the VIN UVLO with a resistor divider between VIN, ENL, and AGND.

ORDERING INFORMATION

PART NUMBER

PACKAGE

MARKING

(LINE 1: P/N)

SiC402ACD-T1-GE3

SiC402BCD-T1-GE3

PowerPAK

MLP55-32L

SiC402A

SiC402B

SiC402DB

Reference Board

P/N

II

Format:

Fyww

Line 1: Dot

Line 2: P/N

Line 3: Siliconix Logo + LOT Code + ESD Symbol

Line 4: Factory Code + Year Code + Work Week Code

S14-2048-Rev. C, 13-Oct-14

2

Document Number: 63729

For technical questions, contact: powerictechsupport@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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