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AUIR3330STRR

PROTECTED HIGH FREQUENCY HIGH SIDE SWITCH

International Rectifier 

AUIR3330S

Over-power protection

The AUIR3330S have an internal over-power protection. This feature allows protecting the silicon device and the

application against several critical issues:

 The bootstrap capacitor missing.

 Abnormal leakage on the bootstrap capacitor.

 Abnormal leakage on the power MOSFET gate.

 Very low impedance output short circuit.

ED_pch signal

Actif if Vgs > Vth

Vds_075 signal

Sw1

Actif if Vds < 0.75 V

Igen1

R1

C

Igen2 R2

• The time constant Ign1 + C represent the thermal

silicon time constant

• The time constant Ign2 + C represent the thermal

+ OVP_Flt signal

package time constant (T(ign2 + C) < T Slp)

- Go to the latch block

• Igen1 is on if the gate voltage (of the

output MOSFET) is higher than its Vth

• Ign2 is always switching on.

Time to charge the capacitor and latch a fault (Igen1 + C) = 9µs

Time to discharge the capacitor (Igen2 + C) = 11ms

• Sw1 is close if the Vbat – out voltage (Vds)

is lower than 0.75V

When the Output MOSFET gate voltage reaches its output MOSFET Vth value, the current generator Igen1 start

to charge the capacitor C. Then three scenarios are possible:

1. The device turn on properly (Vds < 0.75v) and the capacitor C is discharged by the switch sw1. The device is

ready for the next pulse. It is the normal

In input

case.

Vgs voltage

Normal value

2. The device can not turn on properly (Vds

stay > 0.75v no capacitor reset) and the on

time duration (duty cycle) is enough long to

charge completely the capacitor C. The

comparator detects the fault, stop the

device and latch it. This fault could be reset

by a sleep mode

Vbat – Voutput voltage

(Vds)

Ed_pch signal

C capacitor

voltage

OVP_Flt

signal

11 www.irf.com © 2012 International Rectifier

May 29, 2014

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