HIP4080A/81AEVALZ Просмотр технического описания (PDF) - Intersil

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HIP4080A/81AEVALZ

HIP4080A, 80V High Frequency H-Bridge Driver

Intersil 

Application Note 9404

approaches 100%, the available “off-time”, tOFF approaches

zero. Equation 2 shows the relationship between tOFF, fPWM

and the duty cycle.

tOFF = (1-DC)/fPWM

(EQ. 2)

As soon as the upper MOSFET is turned off, the voltage on

the phase terminal (the source terminal of the upper

MOSFET) begins its descent toward the negative rail of the

high voltage bus. When the phase terminal voltage becomes

less than the VCC voltage, refreshing (charging) of the

bootstrap capacitor begins. As long as the phase voltage is

below VCC refreshing continues until the bootstrap and VCC

voltages are equal.

The off-time of the upper MOSFET is dependent on the gate

control input signals, but it can never be shorter than the

dead-time delay setting, which is set by the resistors

connecting HDEL and LDEL to VSS. If the bootstrap

capacitor is not fully charged by the time the upper MOSFET

turns on again, incomplete refreshing occurs. The designer

must insure that the dead-time setting be consistent with the

size of the bootstrap capacitor in order to guarantee

complete refreshing. Figure7 illustrates the circuit path for

refreshing the bootstrap capacitor.

HIP 4080

HIGH SIDE

DRIVE

AHB

AHO

HIGH VOLTAGE BUS VBUS

TO “B-SIDE”

OF

H-BRIDGE

AHS DBS

CBS

LOW SIDE

DRIVE

VCC

ALO

ALS

VSS

LOWER

MOSFET

SUPPLY

BYPASS

CAPACITOR

TO LOAD

+VBIAS

(12VDC)

TO “B-SIDE”

OF H-BRIDGE

NOTE: Only “A-side” of H-bridge Is Shown for Simplicity.

Arrows Show Bootstrap Charging Path.

FIGURE 7. BOOTSTRAP CAPACITOR CHARGING PATH

The bootstrap charging and discharging paths should be

kept short, minimizing the inductance of these loops as

mentioned in the section, “Lower Bias Supply Design”.

Bootstrap Circuit Design - An Example

Equation 1 describes the relationship between the gate

charge transferred to the MOSFET upon turn-on, the size of

the bootstrap capacitor and the change in voltage across the

bootstrap capacitor which occurs as a result of turn-on

charge transfer.

The effects of reverse leakage current associated with the

bootstrap diode and the bias current associated with the

upper gate drive circuits also affect bootstrap capacitor

sizing. At the instant that the upper MOSFET turns on and its

source voltage begins to rapidly rise, the bootstrap diode

becomes rapidly reverse biased resulting in a reverse

recovery charge which further depletes the charge on the

bootstrap capacitor. To completely model the total charge

transferred during turn-on of the upper MOSFETs, these

effects must be accounted for, as shown in Equation 3.

CBS

=

-Q----G-------+----Q-----R-----R------+-----(-----I----D----------R--f----P-----+---W-------I----Q-M---------B---------S----------)

VBS1-VBS2

(EQ. 3)

where:

IDR = Bootstrap diode reverse leakage current

IQBS = Upper supply quiescent current

QRR = Bootstrap diode reverse recovered charge

QG = Turn-on gate charge transferred

fPWM = PWM operating frequency

VBS1 = Bootstrap capacitor voltage just after refresh

VBS2 = Bootstrap capacitor voltage just after upper turn on

CBS = Bootstrap capacitance

From a practical standpoint, the bootstrap diode reverse

leakage and the upper supply quiescent current are

negligible, particularly since the HIP4080A’s internal charge

pump continuously sources a minimum of about 30µA. This

current more than offsets the leakage and supply current

components, which are fixed and not a function of the

switching frequency. The higher the switching frequency, the

lower is the charge effect contributed by these components

and their effect on bootstrap capacitor sizing is negligible, as

shown in Equation 3. Supply current due to the bootstrap

diode recovery charge component increases with switching

frequency and generally is not negligible. Hence the need to

use a fast recovery diode. Diode recovery charge

information can usually be found in most vendor data sheets.

For example, if we choose a Intersil IRF520R power

MOSFET, the data book states a gate charge, QG, of 12nC

typical and 18nC maximum, both at VDS = 12V. Using the

maximum value of 18nC the maximum charge we should

have to transfer will be less than 18nC.

Suppose a General Instrument UF4002, 100V, fast recovery,

1A, miniature plastic rectifier is used. The data sheet gives a

reverse recovery time of 25ns. Since the recovery current

waveform is approximately triangular, the recovery charge can

be approximated by taking the product of half the peak reverse

current magnitude (1A peak) and the recovery time duration

(25ns). In this case the recovery charge should be 12.5nC.

7

AN9404.3

December 11, 2007

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