V436516Z04VATG-10PC Просмотр технического описания (PDF) - Mosel Vitelic, Corp
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V436516Z04VATG-10PC Datasheet PDF : 11 Pages
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MOSEL VITELIC
SPD-Table for -10 PC modules: (Continued)
Byte
Number Function Described
30
Minimum RAS Pulse Width tRAS
31
Module Bank Density (Per Bank)
32
SDRAM Input Setup Time
33
SDRAM Input Hold Time
34
SDRAM Data Input Setup Time
35
SDRAM Data Input Hold Time
36-61 Superset Information (May be used in Future)
62
SPD Revision
63
Checksum for Bytes 0 - 62
64-125
Manufacturers Information (Optional)
(FFh if not used)
126
Max. Frequency Specification
127
100 MHz Support Details
128+ Unused Storage Location
Absolute Maximum Ratings
Parameter
Voltage on VDD Supply Relative to VSS
Voltage on Input Relative to VSS
Operating Temperature
Storage Temperature
Power Dissipation
DC Characteristics
TA = 0°C to 70°C; VSS = 0 V; VDD, VDDQ = 3.3V ± 0.3V
Symbol Parameter
VIH
Input High Voltage
VIL
Input Low Voltage
VOH
Output High Voltage (IOUT = –4.0 mA)
VOL
Output Low Voltage (IOUT = 4.0 mA)
II(L)
Input Leakage Current, any input
(0 V < VIN < 3.6 V, all other inputs = 0V)
IO(L)
Output leakage current
(DQ is disabled, 0V < VOUT < VCC)
V436516Z04VATG-10PC Rev. 1.2 May 2001
5
V436516Z04VATG-10PC
SPD Entry Value
48 ns
128 MByte
2.0 ns
1 ns
2.0 ns
1 ns
Revision 1
100 MHz
Hex Value
100 MHz
-10PC
30
20
20
10
20
10
00
12
10
XX
64
AF
00
Max.
-1 to 4.6
-1 to 4.6
0 to +70
-55 to 125
4
Units
V
V
°C
°C
W
Limit Values
Min.
Max.
2.0
–0.5
V CC +0.3
0.8
2.4
—
—
0.4
–10
10
–10
10
Unit
V
V
V
V
µA
µA
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