DDR SDRAM
E0338M10 (Ver.1.0)
(Previous Rev.1.54E)
Jan. '03 CP(K)
M2S56D20/ 30/ 40ATP
M2S56D20/ 30/ 40AKT
256M Double Data Rate Synchronous DRAM
FUNCTION TRUTH TABLE (3/4)
Current State /CS /RAS /CAS /WE Address
PRE-
H X X XX
CHARGING L H H H X
L H H L BA
L H L X BA, CA, A10
L L H H BA, RA
L L H L BA, A10
L L L HX
LL
L
L
Op-Code,
Mode-Add
HX
ROW
ACTIVATING L H
LH
X XX
H HX
H L BA
L H L X BA, CA, A10
L L H H BA, RA
L L H L BA, A10
L L L HX
LL
L
L
Op-Code,
Mode-Add
HX
WRITE RE-
COVERING L H
LH
X XX
H HX
H L BA
L H L X BA, CA, A10
L L H H BA, RA
L L H L BA, A10
L L L HX
LL
L
L
Op-Code,
Mode-Add
Command
DESEL
NOP
TERM
READ / WRITE
ACT
PRE / PREA
REFA
MRS
DESEL
NOP
TERM
READ / WRITE
ACT
PRE / PREA
REFA
MRS
DESEL
NOP
TERM
READ / WRITE
ACT
PRE / PREA
REFA
MRS
Action
NOP (Idle after tRP)
NOP (Idle after tRP)
ILLEGAL
ILLEGAL
ILLEGAL
NOP (Idle after tRP)
ILLEGAL
ILLEGAL
NOP (Row Active after tRCD)
NOP (Row Active after tRCD)
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
NOP
NOP
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Notes
2
2
2
4
2
2
2
2
2
2
2
2
11