CDP1854A3 Просмотр технического описания (PDF) - Intersil
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CDP1854A3 Datasheet PDF : 12 Pages
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CDP1854A/3, CDP1854AC/3
Dynamic Electrical Specifications tR, tF = 15ns, VIH = VDD, VIL = VSS, CL = 100pF, (See Figure 7)
PARAMETER
VDD
(V)
LIMITS
-55oC, +25oC
+125oC
MIN
MAX
MIN
MAX
RECEIVER TIMING - MODE 0
Clock Period
tCC
5
240
-
280
-
10
120
-
145
-
Pulse Width
Clock Low Level
tCL
5
105
-
125
-
10
55
-
65
-
Clock High Level
tCH
5
135
-
155
-
10
65
-
80
-
DATA AVAILABLE RESET
tDD
5
75
-
90
-
10
45
-
50
-
Setup Time
Data Start Bit to Clock
tDC
5
105
-
130
-
10
65
-
85
-
Propagation Delay Time
DATA AVAILABLE RESET to
Data Available
tDDA
5
10
-
240
-
280
-
130
-
145
Clock to Data Valid
tCDV
5
10
-
360
-
420
-
175
-
195
Clock to Data Available
tCDA
5
10
-
320
-
375
-
155
-
180
Clock to Overrun Error
tCOE
5
10
-
365
-
415
-
170
-
190
Clock to Parity Error
tCPE
5
10
-
275
-
320
-
135
-
155
Clock to Framing Error
tCFE
5
10
-
270
-
320
-
135
-
165
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
11
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