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CS5651 Просмотр технического описания (PDF) - Cherry semiconductor

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CS5651 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Operating Description: continued
ter capacitor. Ceramic bypass capacitors (0.1µF) connected
directly to VCC and VREF may be required to improve noise
filtering. This provides a low impedance path for filtering
the high frequency noise. All high current loops should be
kept as short as possible using heavy copper runs. The
error amp compensation circuitry and the converter out-
put voltage-divider should be located close to the IC and
as far as possible from the power switch and other noise
generating components.
Timing Diagram
SYNC
Capacitor CT
Latch 1
“Set” Input
COMP1
Sense1
Latch 1
“Reset” Input
VOUT1
ENABLE2
0V
Latch 2
“Set” Input
COMP2
Sense2
Latch 2
“Reset” Input
VOUT2
Typical Application Diagram
Dual Boost Regulator
VCC
CF2
VREF
Sync
VOUT1
RFB1
RT CT
RFB2
VFB1
COMP1
VOUT2
ENABLE2
RFB3
RFB4
VFB2
COMP2
5.0V
2.5V
Reference
Regulator
R
Internal
Bias
+
R
+
3.4V-
-
VREF
UVLO
20k
VCC +
UVLO -
14V
+
Oscillator
+
-
Error
Amp 1
Current Sense
2R Comparator 1
1.0VREF
+ 1.0V
+
-
R
250µA
PWM
Latch 1
S
RQ
+
-
Error
Amp 2
+
1.0mA
Current Sense
Comparator 2
2R
1.0V
+
-
R
PWM
Latch 2
S
RQ
R
Gnd Pwr Gnd
VIN
CF1 +
L1
D1
Q1
VOUT1
RSense1
L2
D2
Sense1
Q2
VOUT2
+
VOUT1
COUT1
+
VOUT2
COUT2
Sense2
RSense2
7

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