WS1M8V-100CIA Просмотр технического описания (PDF) - White Electronic Designs => Micro Semi

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WS1M8V-100CIA

2x512Kx8 DUALITHIC™ SRAM

White Electronic Designs => Micro Semi 

WS1M8V-XCX

2x512Kx8 DUALITHIC™ SRAM ADVANCED*

PIN CONFIGURATION FOR WS1M8V-XCX

32 DIP

TOP VIEW

A18 1

A16 2

A14 3

A12 4

A7 5

A6 6

A5 7

A4 8

A3 9

A2 10

A1 11

A0 12

I/O0 13

I/O1 14

I/O2 15

GND 16

32 VCC

31 A15

30 A17

29 WE

28 A13

27 A8

26 A9

25 A11

24 CS2

23 A10

22 CS1

21 I/O7

20 I/O6

19 I/O5

18 I/O4

17 I/O3

FEATURES

s Access Times 70, 85, 100ns

s Evolutionary, Corner Power/Ground Pinout

s Packaging:

• 32 pin, Hermetic Ceramic DIP (Package 300)

s Organized as two banks of 512Kx8

s Commercial, Industrial and Military Temperature Ranges

s 3.3V Power Supply

s Low Power CMOS

s TTL Compatible Inputs and Outputs

s Output Enable Internally tied to GND.

* This data sheet describes a product that may or may not be under

development and is subject to change or cancellation without notice.

PIN DESCRIPTION

A0-18

I/O0-7

CS1-2

WE

VCC

GND

Address Inputs

Data Input/Output

Chip Selects

Write Enable

+3.3V Power Supply

Ground

BLOCK DIAGRAM

WE

A0-18

I/O0-7

512K x 8

512K x 8

C S 1 (1)

(1)

CS2

NOTE:

1. CS1 and CS2 are used to select the lower and upper 512Kx8 of the

device. CS1 and CS2 must not be enabled at the same time.

February 2000 Rev. 2

1

White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

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